Highly flexible configurable data post-processor for deep neural network

Abstract

The invention discloses a highly flexible configurable data postprocessor for a deep neural network, the configuration mode of the processor is divided into pre-operation (AOT) configuration and runtime (RT) configuration, and the AOT configuration mode works in the hardware implementation stage of the data postprocessor and is used for obtaining the data postprocessor required by a user; the RT configuration mode works in the operation stage of the deep neural network acceleration engine, and at the moment, hardware implementation of the data postprocessor is completed. According to the invention, hardware resources which can be used by the data postprocessor are determined through AOT configuration; a data processing path of the data postprocessor during operation is determined through RT configuration; a more flexible use mode is provided for a user of the data postprocessor, balance among power consumption, performance and cost is facilitated, meanwhile, the situation that the special data postprocessor is designed due to the fact that the special data postprocessor needs to be matched with different network layers is avoided, hardware cost is reduced, and the design requirement of a cost-sensitive deep neural acceleration engine is met.

Description

technical field [0001] The invention relates to the technical field of deep neural network processors, in particular to a highly flexibly configurable data post-processor for deep neural networks. Background technique [0002] Deep neural network is a widely used machine learning algorithm. In deep neural network, it usually includes standard convolution layer, pooling layer, fully connected layer and activation layer. At present, the common dedicated deep neural network accelerators widely use dedicated hardware circuits to support the operation of each layer of the neural network. This dedicated hardware circuit usually consists of a MAC matrix and a data post-processing module. The data post-processing module will perform different processing on the MAC matrix output data for different network layers. For example, the convolution layer will perform cumulative calculations. In addition, the data post-processor can also support additional operations required for data block...

AI Technical Summary

Problems solved by technology

[0003] Although the dedicated hardware architecture can provide higher computing speed, each layer of the network will be implemented by a dedicated hardware circuit, so there will be a dedicated MAC matrix and data post-processing module. Such an architecture has a low hardware reuse rate and consumes More hardware resources cannot meet the needs of some cost-sensitive usage scenarios

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