Embedded fault injection module and method and high-speed digital circuit system

Abstract

The invention belongs to the technical field of digital circuit testability verification, and discloses an embedded fault injection module, a high-speed digital circuit system and an embedded fault injection method. The embedded fault injection module comprises a signal path circuit which is used for ensuring that a high-speed digital circuit system has the same signal characteristics as before access after the embedded fault injection module is accessed and can intervene in a signal path during fault injection, a fault injection control circuit which is used for controlling the signal path circuit and controlling implementation of fault injection, a fault mode sub-module circuit that is used for storing a fault injection sequence according to a fault mode library of the high-speed digitalcircuit module and generating fault injection data of a low-speed signal, and a data communication circuit which is used for receiving and analyzing the fault mode simulation instruction of an uppercomputer and transmitting information to the fault injection control circuit. Therefore, a problem of high-speed signal fault injection of the high-speed digital circuit module can be solved.

Description

technical field [0001] The invention belongs to the technical field of radar testability verification, and in particular relates to an embedded fault injection module, a method and a high-speed digital circuit system. Background technique [0002] With the improvement of production and manufacturing technology, the integration of digital circuits is getting higher and higher. With the development of new technologies such as high-speed serial bus, the signal speed of digital circuits is getting higher and higher. It is becoming more and more difficult to simulate faults using traditional destructive physical means. Failure modes, fault injection and fault verification are more and more stuck in theoretical analysis. The coverage of injectable failure modes is decreasing, and failure modes such as high-speed signals cannot be actually injected. The reliability of product test design evaluation results is low, which cannot reflect the actual status of product test design, whic...

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Problems solved by technology

[0003] 1. High-speed signals such as RapidIO and PCIE cannot perform fault injection, because high-speed serial bus signals such as RapidIO can only use point-to-point communication, it is difficult to intervene from the outside, and fault injection is difficult to achieve;

[0004] 2. High-speed signals such as RapidIO and PCIE cannot be verified for testability, because high-speed serial bus signals such as RapidIO are unfavorable faults, which makes testability verification impossible;

[0005] 3. High-speed digital circuit module testability design evaluation lacks reliable basis, fault injection is difficult to implement and testability verification methods are lacking, which makes testability design evaluation less reliable

[0006] 4. The software platform for testability verification of high-speed digital circuits is complex

The problem with this patent application is that the fault injection control system consists of a computer, a core control module, a standard interface, etc., involving complex host computer function software, etc.; the fault injection is the fault injection of various types of buses, which cannot solve the problems of RapidIO, PCIE, Difficulties of Fault Injection in High-Speed ​​Buses such as SERDES

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