Method and system for realizing consistency of cached data of multi-path processor based on distributed finite directory

Abstract

The invention discloses a method and system for realizing consistency of cached data of a multi-path processor based on a distributed finite directory. According to the invention, the private cache responds to the request of the corresponding processing unit; and when hitting does occurs, a data read-write consistency request transaction is sent to the corresponding host DDCU, if the host DDCU encounters a resource conflict, the messages are discarded, a flow control mode is entered into, and the discarded messages are retransmitted one by one by the private cache based on a message appointment principle until the flow control mode is exited and a normal line production mode is entered into after the resource conflict is removed. According to the invention, the problem of starvation of request affairs due to blockage of a working pipeline by directory self-replacement can be solved, meanwhile, strict execution sequence guarantee is provided, it is guaranteed that the data dependency relationship is not damaged and the data dependency relationship among the request transactions can be completely kept in the multi-processor distributed environment, it is guaranteed that the request transactions sent by the multiple cores can be fairly and coordinately executed, and then the reliability and expandability of the many-core processor are improved.

Description

technical field [0001] The invention relates to a multi-core processor architecture, in particular to a method and system for realizing data consistency of multi-processor caches based on a distributed limited directory, which is used to solve the problem that the directory-based cache (Cache) consistency protocol has a problem in the capacity of directory memory. When limited, directory self-replacement blocks the work pipeline and causes the request transaction to starve to death. Background technique [0002] The commonly used implementation method of many-core microprocessors is isomorphic integration, that is, integrating multiple mature general-purpose processing cores with the same structure and powerful functions. For example, Intel integrates 32 processor cores in the Skylake-EP Xeon E5 chip; AMD integrates 16 processor cores in the Ryzen Threadripper processor; and Feiteng series server chips integrate 16~64 processor cores. like figure 1 As shown, the many-core ...

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Problems solved by technology

[0005] The technical problem to be solved by the present invention: Aiming at the above-mentioned problems of the prior art, a method and system for realizing the consistency of multi-processor cache data based on a distributed limited directory is provided. The problem of starvation of request transactions, while providing strict execution order guarantees, ensures that in a distributed environment, data dependencies are not destroyed, data dependencies between request transactions can be completely maintained, and request transactions sent by multiple cores can be fair Coordinated execution of many-core processors improves reliability and scalability

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