Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Power module, chip embedded packaging module and preparation method

A packaging module, embedded technology, applied in the direction of printed circuit manufacturing, circuits, printed circuits, etc., can solve the problems of thermal expansion coefficient mismatch, chip edge position and delamination of insulating plastic packaging materials, etc., to achieve the effect of inhibiting delamination

Active Publication Date: 2020-07-14
DELTA ELECTRONICS SHANGHAI CO LTD
View PDF4 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The invention provides a power supply module, a chip-embedded packaging module and a preparation method, which solves the problem that the edge position of the chip and the insulating plastic packaging compound are delaminated due to the thermal expansion coefficient mismatch between the chip and the insulating plastic packaging material in the existing packaging module

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Power module, chip embedded packaging module and preparation method
  • Power module, chip embedded packaging module and preparation method
  • Power module, chip embedded packaging module and preparation method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 10

[0133] The chip-embedded packaging module of the tenth embodiment shortens the circuit paths from the capacitor 14 to the input terminal of the module and the circuit paths to the two chips 1, and the effects of efficiency, current sharing and ripple cancellation can be further enhanced. If no capacitive parts are arranged above the packaging structure, the inductor 16 can be directly combined with the packaging structure, and the structure can be more compact. Other capacitors may also be provided outside the chip 1, and these capacitors may be input capacitors Cin, output capacitors Co, and so on. The current sharing effect and ripple cancellation effect of this structure are further enhanced when the two-phase half-bridge circuit is connected in parallel, which is beneficial to reduce the number of capacitors or the demand for capacitance value, the structure is more compact, and the heat dissipation effect is better.

[0134] It can be seen from the above embodiments that ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a power module, a chip embedded packaging module and a preparation method. The chip embedded packaging module comprises a chip which is provided with a first surface and a second surface which are oppositely arranged; a first plastic part which comprises a first covering part and a first protrusion, wherein the first covering part wraps at least one part of the first surfaceof the chip, the first protrusion wraps the side face of the chip, and the surface where the top end of the first protrusion is located and the second surface of the chip are located are located on the same plane; a second plastic part which comprises a second covering part and a second protrusion, wherein the second covering part covers at least one part of the second surface of the chip, the second protrusion is arranged on the side face of the chip, and the surface where the top end of the second protrusion is located and the second surface of the chip are not located on the same plane. Therefore, a non-equal-height discontinuous interface structure is formed between the surface where the top end of the second protrusion is located and the second surface of the chip, a delamination expansion path at the edge position of the chip is cut off, and delamination initiation is effectively inhibited.

Description

technical field [0001] The invention relates to a power supply module, a chip-embedded packaging module and a preparation method, and belongs to the technical field of power electronics. Background technique [0002] With the rapid development of data processors, smart phones, driverless and other fields, the requirements for power supply products are also getting higher and higher. In order to improve the power density of the power module, the current power module generally encapsulates the conductive part in the power module and the chip placed in the conductive part through an insulating plastic compound. However, during the packaging process, due to the large difference in the coefficient of thermal expansion (CTE) between the chip and the insulating molding compound, it is easy to cause delamination between the edge of the chip and the insulating molding compound due to CTE mismatch, which seriously affects the reliability of the power module. Contents of the inventio...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L23/31H01L25/18H01L21/56H01L23/367H01L23/495H01L23/48H01L21/60
CPCH01L23/3107H01L25/18H01L24/03H01L24/02H01L23/3675H01L23/49541H01L23/49568H01L23/49575H01L21/56H01L2224/02331H01L2224/02333H01L2224/03462H01L2224/97H01L2224/2518H01L2224/24225H05K1/0271H05K3/4697H05K3/4602H05K2201/0187H05K2201/068H05K2201/09045H05K3/4608H05K2201/10416H01L2924/15153H01L2224/04105H01L2224/73267H01L2224/24137H01L2224/24195H01L2224/92144H01L2924/3511H05K3/40H05K7/06H05K13/0413H01L23/28H01L23/642H01L23/645H01L23/647
Inventor 洪守玉陈庆东周甘宇陈燕辛晓妮季鹏凯
Owner DELTA ELECTRONICS SHANGHAI CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products