Storage structure and preparation method thereof

A storage structure and stacking structure technology, which is applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of UCH-LCH and C1CH-UCH alignment difficulties, and achieve the alignment of common source local contacts and slit structures Difficulty, reducing the occupied area, reducing the difficulty and cost of the process

Active Publication Date: 2021-05-07
YANGTZE MEMORY TECH CO LTD
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Problems solved by technology

[0005] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a storage structure and its preparation method, which is used to solve the problem of difficult alignment of UCH-LCH and C1CH-UCH in the storage structure in the prior art

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  • Storage structure and preparation method thereof
  • Storage structure and preparation method thereof

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Embodiment Construction

[0092] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0093] see Figure 1 to Figure 10 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed ar...

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Abstract

The invention provides a storage structure and a preparation method thereof. By first preparing a channel structure and channel local contacts, and then preparing a step stack structure from the base side, the problem of the first channel structure and the second channel caused by the step process can be effectively solved. The problem of difficult alignment of the channel structure and the problem of difficult alignment of the local contact of the channel with the second channel structure. Further, the present invention draws the common source from the base side by preparing a pseudo-slit structure, without the need for electrical connection between the local contact of the common source and the slit structure, thereby fundamentally solving the problem of partial contact of the common source and the slit. The difficulty of structure alignment reduces the process difficulty and cost, and because of the pseudo-slit structure, there is no need to fill the conductive layer, thereby reducing the area occupied by the slit structure.

Description

technical field [0001] The invention belongs to the field of semiconductor design and manufacture, and relates to a storage structure and a preparation method thereof. Background technique [0002] With the development of technology, the semiconductor industry is constantly looking for new production methods so that each memory die in a memory device has a greater number of memory cells. In a non-volatile memory, one way to increase the memory density is by using a vertical memory array, and with the improvement of the integration level, the number of layers of the memory has been developed from 32 layers to 64 layers, or even higher. [0003] In the existing storage structure preparation process, it mainly includes the following processes: lower step (LSS)-lower channel (LCH)-upper step (USS)-upper channel (UCH)-slot structure (GL)-lower step Contact (LCT)-Upper Step Contact (UCT)-Partial Contact (C1CH and C1ACS)-Contact (V0). However, as the number of layers of the stora...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11568H01L27/11582
CPCH10B43/30H10B43/27
Inventor 徐伟杨星梅王健舻吴继君黄攀周文斌
Owner YANGTZE MEMORY TECH CO LTD
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