Error Resisting Method Based on Cyclic Redundancy Check and Erasure Coding
A technology of cyclic redundancy and erasure correction coding, which is applied in the direction of error detection coding, data representation error detection/correction, error correction/detection using block code, etc., and can solve the problems of channel random bit error and burst error, etc. Achieve the effects of low delay, low complexity, and improved ability to resist bit errors
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[0027] Below, combine Figure 1 to Figure 4 The present invention is further described.
[0028] The anti-error method based on cyclic redundancy check and erasure coding is characterized in that it comprises the following steps:
[0029] Encoder:
[0030] (1) At the coding end, the transmitted data encoded by the source is divided into frames;
[0031] The wireless communication system that the present invention applies is as figure 1 As shown, the algorithm involved in the invention performs erasure coding with a data frame structure, and a total of 250 bytes of data per frame are processed. The whole algorithm structure flow is as follows figure 2 shown.
[0032] (2) Add 3 frames of erasure coded frames after every 17 frames of data;
[0033] For the data after framing, the erasure coding of the present invention adopts fast Vandermonde erasure coding technology.
[0034] In order to facilitate the description of related technologies in the encoding process, let the...
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