A kind of flip-chip interconnection structure and preparation method thereof

Abstract

The present invention is applicable to the field of flip-chip technology, and provides a method for preparing a flip-chip interconnection structure, which is used to realize flip-chip interconnection between a first chip and a second chip, wherein the preparation method includes: preparing solder bumps on the pads of the chip; preparing stud bumps on the pads of the second chip; flipping the first chip onto the second chip so that the solder bumps are aligned with the nails The head bumps are fused and welded to form a flip-chip interconnection structure between the first chip and the second chip. The preparation method provided by the present invention does not need to accurately control the thickness of electroplated solder bumps or copper pillars, which reduces the difficulty of the process; and increases the connection height between chips, which can make it difficult to generate signal crosstalk and difficult to form between the upper and lower chips. Small cavity resonance realizes the application of metal bumps in high-frequency and high-speed chip 3D stacking integration.

Description

technical field [0001] The invention belongs to the technical field of flip chips, and in particular relates to a flip chip interconnection structure and a preparation method thereof. Background technique [0002] With the continuous extension of Moore's Law, the size of chip technology devices is getting smaller and smaller, and integrated circuit chips have a higher degree of integration. However, when the size of the device reaches the deep submicron scale, it becomes more and more difficult to further reduce it. The research on chip design begins to develop in a three-dimensional direction, and chip stack packaging technology appears. [0003] Chip stack packaging technology requires the use of narrow-pitch (bump pitch less than 200 microns) flip-chip bonding method for soldering between chips. In the prior art, solder bumps are usually used for flip-chip bonding between chips. For example, in the chip Solder bumps are formed by electroplating a solder layer on the surf...

AI Technical Summary

Problems solved by technology

[0005] In view of this, the present invention provides a flip-chip interconnection structure and its preparation method to solve the difficulty in the 3D stacking integration process of chips using solder bumps in the prior art, while using metal bumps for 3D stacking of chips Integration has the problem of signal crosstalk

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