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Multi-protocol high-speed pseudo-random signal loopback test system based on FPGA

A pseudo-random signal and loopback test technology, applied in the field of multi-protocol high-speed pseudo-random signal loopback test systems, can solve the problems of low repetition rate and high price of the test system, and achieve the effects of simple operation, complete functions and low cost

Active Publication Date: 2020-04-14
浙江宏信安检测认证技术有限公司
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the randomness and complexity of the data interface of the communication system, most of the existing test systems are customized according to the needs, generally only support a single protocol and a single test mode, and the reuse rate is low, while the test systems on the market that meet the requirements tend to be more expensive

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  • Multi-protocol high-speed pseudo-random signal loopback test system based on FPGA
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  • Multi-protocol high-speed pseudo-random signal loopback test system based on FPGA

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Embodiment Construction

[0029] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0030] On the contrary, the invention covers any alternatives, modifications, equivalent methods and schemes within the spirit and scope of the invention as defined by the claims. Further, in order to make the public have a better understanding of the present invention, some specific details are described in detail in the detailed description of the present invention below. The present invention can be fully understood by those skilled in the art without the description of these detailed parts.

[0031] see Figure 1-4 , including the FPGA part and the host computer part 20, wherein,

[0032] Th...

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Abstract

The invention discloses a multi-protocol high-speed pseudorandom signal loopback test system based on an FPGA. The system comprises an FPGA part and an upper computer part; the FPGA part is connectedwith the upper computer part through a USB interface, and the FPGA part comprises an FPGA chip, two four-channel small optical fiber pluggable transceivers, eight single-channel optical fiber pluggable transceivers, a dual-channel USB chip and a programmable crystal oscillator; the upper computer part comprises a flow rate control module, a random number seed generation module, a data flow direction definition module, a programmable crystal oscillator control module, a rate error rate calculation module, a data flow protocol redefinition module, a USB data framing module, a USB data de-framingmodule, a USB driver and a graphical user interface display module. The invention provides three different loopback test modes to meet the requirements of different tested systems, and has a very high application value in the performance test of a high-speed communication system.

Description

technical field [0001] The invention belongs to the field of signal detection and relates to an FPGA-based multi-protocol high-speed pseudo-random signal loopback test system. Background technique [0002] With the continuous improvement of the speed of the communication system, higher requirements are put forward for the test system. It is often required that the test system can generate a test data flow of more than 100Gb / s, and can detect performance indicators such as communication rate and bit error rate in real time. With its high-speed parallel processing capability, FPGA has been widely used in digital signal processing, high-speed communication, artificial intelligence and other fields. With the continuous development of FPGA technology, integrated high-speed serial transceivers inside the chip have become the mainstream, which provides a hardware basis for generating high-speed data streams. [0003] For most of the existing high-speed communication systems, the d...

Claims

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Application Information

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IPC IPC(8): H04B17/00H04L12/26
CPCH04B17/00H04L43/50
Inventor 程知群尉倞浩刘国华田刚
Owner 浙江宏信安检测认证技术有限公司
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