SIFT algorithm hardware acceleration method based on DSP platform

An algorithm and platform technology, applied in the field of hardware acceleration of SIFT algorithm based on DSP platform, can solve the problem that the overall calculation speed of the DSP kernel algorithm has not made obvious breakthroughs, and the performance of the dual data channel of the DSP kernel hardware multiplier has not been fully utilized. Speed, convenient programming effect

Active Publication Date: 2020-02-07
GUILIN UNIV OF AEROSPACE TECH
View PDF3 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This kind of research focuses on multithreading to achieve speed improvement, but it does not fully utilize the performance of hardware such as DSP core hardware multipliers, accumulators, and dual data channels, so that the overall calculation speed of DSP core algorithms has not achieved a significant breakthrough

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • SIFT algorithm hardware acceleration method based on DSP platform
  • SIFT algorithm hardware acceleration method based on DSP platform

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0015] The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0016] The DSP platform-based SIFT algorithm hardware acceleration method of the present invention comprises the following steps:

[0017] 1. After the system is initialized, recompile the algorithm into a C language program, so that the preprocessed algorithm program can run on the DSP platform, including the following steps:

[0018] 1) Constrain the interface functions in the SIFT algorithm running on non-DSP platforms.

[0019] 2) Recompile the library functions in the program after step 1) based on C language.

[0020] The SIFT algorithm of the non-DSP platform uses a large number of platform library functions, which are very inefficient to run on the DSP platform and occupy a lot of resources. Therefore, it is necessary to recompile the C language function library of the non-DSP platform.

[0021] 3) Calculation and restoration of the SSE acc...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses an SIFT algorithm hardware acceleration method based on a DSP platform. The SIFT algorithm hardware acceleration method comprises the following steps: 1) recompiling an SIFT algorithm into a C language program capable of running on the DSP platform; 2) converting the type of the image data, so that the image data processed by the SIFT algorithm is calculated by using a DSPplatform hardware calculation unit to the greatest extent; and 3) optimizing the calculation iteration section of the SIFT algorithm to maximize the use of software and hardware resources of the DSP kernel. According to the SIFT algorithm hardware acceleration method, the calculation speed of the SIFT algorithm is improved through image data structure, image function reconstruction and iterative calculation optimization on the premise of high-precision extraction of image feature point information.

Description

technical field [0001] The invention relates to a feature point extraction method based on a DSP platform, in particular to a hardware acceleration method for a SIFT algorithm based on a DSP hardware platform. It belongs to the field of digital circuit and chip design, embedded system and digital image processing. Background technique [0002] SIFT, or Scale-invariant feature transform, is the first method to describe local features through a robust descriptor that associates a degree of invariance with scale, rotation, illumination, and affine transformations. An important feature of the SIFT algorithm is that it is computationally intensive. Therefore, the floating-point and fixed-point computing performance of the computing platform determines the computing speed of the algorithm. [0003] DSP, or Digital Signal Processor, is a microprocessor suitable for intensive computing and real-time signal processing. Because the calculation of the core of the DSP platform is too...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F8/41G06F9/38
CPCG06F8/41G06F9/3887Y02D10/00
Inventor 赵海盟
Owner GUILIN UNIV OF AEROSPACE TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap