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Array substrate, display panel and display device

An array substrate and display area technology, applied in optics, instruments, electrical components, etc., can solve the problems of large load difference of data connection leads and affect the quality of the display screen, and achieve the goal of reducing height, reducing load difference, and improving quality. Effect

Active Publication Date: 2019-12-03
XIAMEN TIANMA MICRO ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the prior art, the data connection leads are usually located on the first metal layer (the film layer where the scan line is located) and the second metal layer (the film layer where the source and drain electrodes are located), wherein the coupling capacitance between two adjacent data connection leads is relatively small. Large, resulting in a large difference in the load on two adjacent data connection leads, affecting the quality of the display screen

Method used

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  • Array substrate, display panel and display device
  • Array substrate, display panel and display device
  • Array substrate, display panel and display device

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Embodiment Construction

[0029] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only some structures related to the present invention are shown in the drawings but not all structures.

[0030] figure 1 It is a structural schematic diagram of an array substrate provided in the prior art. figure 2 Yes figure 1 Schematic diagram of the cross-sectional structure along the direction AA'. see figure 1 and figure 2 , the display panel includes a display area 11' and a fan-out area 12'; it also includes: a base substrate 310', and a first metal layer 210' located on one side of the base substrate 310'; the first metal layer 210' is used in the display A plurality of scanning lines 111' are formed ...

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Abstract

The embodiment of the invention discloses an array substrate, a display panel and a display device. The array substrate comprises a substrate, a first metal layer, an interlayer dielectric layer, a second metal layer, an organic planarization layer and a third metal layer. In the first metal layer, a plurality of scanning lines is formed in a display area, and a data connection lead is not formedin a fan-out area. In the second metal layer, a plurality of data lines is formed in the display area, and multiple data connection leads are formed in the fan-out area. In the third metal layer, multiple data connection leads are formed in the fan-out area, wherein one end of each of the data connection leads close to the display area is electrically connected with a data line in a one-to-one correspondence mode, every two adjacent data connecting leads are located on different layers, and vertical projections of the data connecting leads on an underlayer substrate at least partially coincide. According to the technical scheme provided by the embodiment of the invention, a load difference between two adjacent data connection leads can be reduced, and meanwhile, the height of the fan-out area can be reduced.

Description

technical field [0001] Embodiments of the present invention relate to the field of display technology, and in particular, to an array substrate, a display panel, and a display device. Background technique [0002] With the development of display technology, liquid crystal displays and organic light-emitting displays have become the two mainstream products in the display field. At the same time, consumers' performance requirements for displays are also constantly improving. [0003] The display usually includes a display area and a frame area surrounding the display area. The display area includes a plurality of scanning lines and a plurality of data lines intersecting each other, and a plurality of scanning lines and a plurality of data lines intersect to define a plurality of sub-pixel units; the frame area includes a lower frame area, the lower frame area includes a plurality of data connection leads, the data connection leads are used to electrically connect the driver ch...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G02F1/1362G02F1/1345G02F1/1333H01L27/32
CPCG02F1/136286G02F1/13452G02F1/1333G02F1/13338G02F1/133357G02F1/13629H10K59/40H10K59/131
Inventor 魏晓丽李东华周秀峰沈柏平
Owner XIAMEN TIANMA MICRO ELECTRONICS
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