Nonvolatile memory readout circuit and readout method

Abstract

The invention provides a nonvolatile memory readout circuit and a readout method, comprising: a nanosecond-level charging pulse generation module, which generates a post-charging pulse signal; a charging voltage generation module, which generates a post-charging voltage; and a charging module for reading bit lines, which provides The read bit line is charged; the first reference read voltage generating circuit charges the reference read bit line and generates a reference read current and a first reference read voltage; a sense amplifier compares the reference read current with the read current to generate a read voltage Signal. The invention improves the rising speed of the read bit line voltage, reduces the peak value of the read current, reduces the dynamic power consumption, and reduces the time required for the read current and the reference read current to reach a stable value; The matching of parasitic parameters introduces the matching of the parasitic parameters of the current mirror in the read current, and performs post-charging operation on the read bit line and the read reference bit line, which eliminates the false read phenomenon to the greatest extent and reduces the read time.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a nonvolatile memory readout circuit and a readout method. Background technique [0002] In the field of integrated circuit manufacturing, as the process nodes continue to shrink, traditional charge-based memories are increasingly limited. Various new memories and new structures have been invented to break through the original limits: MLC NAND, MLC NOR, TLC NAND, MRAM, RRAM, FeRAM, 3D-Xpoint, 3D-NAND, etc. The read latency of traditional and new memories is different: for SRAM as memory, the read time of DRAM is within 10ns, that of NAND Flash is around 50us, that of 3D-NAND is around 500us, and that of hard disk is around 10ms. If the read time of the memory can be further mined, its competitiveness will be greatly improved. [0003] Phase Change Memory (Phase Change Memory, PCM) is a memory based on the Ovshinsky electronic effect proposed by Ovshinsky in the late...

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Problems solved by technology

[0007] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a non-volatile memory readout circuit and a readout method, which are used to solve the problem of excessively long readout time and dynamic power consumption of the non-volatile memory in the prior art. Too big and other problems

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