3D memory device and manufacturing method thereof

Abstract

The invention discloses a 3D memory device and a manufacturing method thereof. The 3D memory device comprises a semiconductor substrate, a gate stack structure, multiple channel columns and a gate isolation structure, wherein the gate stack structure is located on the semiconductor substrate and includes gate conductor layers and interlayer insulation layers which are alternately stacked; the multiple channel columns run through the gate stack structure and is contacted with the semiconductor substrate; the gate isolation structure runs through the gate stack layer to divide a plurality of memory areas and includes a conductive channel and an isolation layer which are formed in a grid line slit, the conductive channel is contacted with the semiconductor substrate, the isolation layer mutually isolates the gate conductor layer from the conductive channel, the grid line slit is disconnected in a predetermined area to form a gap so as to enable the gate conductor layer located in different memory areas to be electrically connected at the gap, the grid line slit includes an end part close to the gap, an extension part and a connecting part used for connecting the end part and the extension part, the channel size of the connecting part close to the end part is less than the channel size thereof close to the extension part so as to limit the cavity volume of the end part, thereby improving the uniformity of the thickness of the isolation layer.

Description

technical field [0001] The present invention relates to memory technology, and more specifically, to a 3D memory device and a manufacturing method thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] The 3D memory device adopts the gate stack structure to provide the gate conductor layer of the selection transistor and the storage transistor, and uses the channel column to pr...

AI Technical Summary

Problems solved by technology

[0004] However, in the prior art, since the cavity size of the grid gap at the notch is too large, it is difficult to form an isolation layer with a uniform thickness in the grid gap at the notch through an etching process. position, it is easy to cause short circuit between the conductive channel and the gate conductor layer, which reduces the reliability of the device

Images