Thyristor with gate capable of being turned off and manufacturing method thereof

Abstract

The invention provides a thyristor with a gate capable of being turned off. A plurality of strips formed by repeatedly arranging a plurality of high-doping-concentration upper tube N-type emitting regions are arranged on the upper surface of an N-type silicon substrate sheet; an upper tube P-type concentrated base region bus bar surrounds the periphery of each strip; a cathode metal layer is arranged on the upper surface of each upper tube N-type emitting region; an upper tube P-type base region is arranged below each upper tube N-type emitting region; the side surface of each upper tube P-type base region is connected with an upper tube P-type concentrated base region or an upper tube P-type concentrated base region bus bar; an upper tube N-type collector region is arranged below the upper tube P-type base region, the upper tube P-type concentrated base region and the upper tube P-type concentrated base region bus bar; a lower tube P-type emitting region is arranged below the upper tube N-type collector region; the lower surface of the lower tube P-type emitting region is connected with an anode metal layer; and a gate metal layer is arranged above the silicon substrate sheet. According to the thyristor with the gate capable of being turned off, the dI / dt resistance and the dV / dt resistance are remarkably enhanced, and the breakdown voltage and the current capacity have a wideapplication range.

Description

technical field [0001] The invention belongs to the technical field of silicon power devices and relates to a thyristor whose gate can be turned off. Background technique [0002] Gate-turn-off thyristors (Gate-Turn-Off Thyristor, GTO) with silicon as the substrate have been available for more than 50 years. [0003] The structure of the gate-turn-off thyristor in the prior art is as follows figure 1 shown. The gate turn-off thyristor is a PNPN four-layer structure, which can be regarded as composed of two bipolar transistors, namely an NPN upper transistor and a PNP lower transistor. The N-type emission area of ​​the NPN upper tube is N 2 Connect the cathode metal layer K. The P-type base region of the NPN upper tube is the P 2 It is the P-type collector area of ​​the PNP lower tube. NPN upper tube P-type base region P 2 Connect to gate metal layer G. The N-type collector area of ​​the NPN upper tube is N 1 It is the N-type base area of ​​the PNP lower tube. The P...

AI Technical Summary

Problems solved by technology

Die area is too large, only suitable for applications above 1000A

And the thickness of the die is above 350μm, so it is only suitable for applications above 2500V

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