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Quasi-constant voltage drop self-stop write-in method of resistive memory unit and circuit thereof

A technology for memory cells and writing circuits, applied in static memory, instruments, etc.

Active Publication Date: 2019-07-23
2X MEMORY TECH CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of the excessive pressure of the above-mentioned memory cells and the excessive pressure time of fast writing memory cells, a method and circuit for self-suspending writing with a quasi-constant voltage drop of resistive memory are proposed to solve the problem of writing to the above-mentioned resistive memory. entry problem

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  • Quasi-constant voltage drop self-stop write-in method of resistive memory unit and circuit thereof
  • Quasi-constant voltage drop self-stop write-in method of resistive memory unit and circuit thereof
  • Quasi-constant voltage drop self-stop write-in method of resistive memory unit and circuit thereof

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Embodiment Construction

[0101] refer to Figure 1A , which shows a partial circuit schematic diagram of a resistive memory writing circuit in the prior art. The conventional resistive memory write circuit 10 includes: write buffer 19 , transistor 11 , transistor 12 , transistor 14 and resistive memory unit 13 (memory cell). Two ends of the resistive memory unit 13 are respectively connected to the drain of the transistor 14 and the source of the transistor 12 . The source of the transistor 14 is connected to the negative power supply terminal (VSS), and the gate thereof is connected to the voltage VG_S. The drain of transistor 12 is connected to the source of transistor 11 and the gate thereof is connected to voltage VWL. The drain of the transistor 11 is connected to the output terminal of the write buffer 19 and its gate is connected to the voltage VG_B. The connection between the resistive memory unit 13 and the transistor 14 is a local source line 16 (local source line). The connection between...

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Abstract

The invention discloses a quasi-constant voltage drop self-stop write-in method of a resistive memory unit. The method comprises the following steps of: establishing a write voltage and a write current flowing through the resistive memory unit; copying the write current to generate a copied write current; enabling the copy write-in current to flow through a simulation circuit to generate a simulation write-in voltage; adding the simulation write-in voltage to the reference voltage in a micro-amplitude manner along with the write-in time so as to generate a write-in reference voltage; and adjusting the write-in voltage and the write-in current according to the write-in reference voltage, so that the cross voltage at the two ends of the resistive memory unit is kept fixed or slightly increased during the write-in period. When the copy write-in current reaches a preset target current value, a stop signal is sent out; and the related write circuit is closed by the stop signal so as to optimize the write period of the resistive memory unit.

Description

technical field [0001] The invention belongs to the writing technology of resistive memory, and in particular relates to a self-suspending writing method and circuit of a quasi-constant voltage drop of a resistive memory unit. Background technique [0002] In electronic circuit systems, random access memory (RAM, random access memory) is one of the indispensable components. Random access memory includes: static random access memory (SRAM, static random access memory) and dynamic random access memory (DRAM, dynamic random access memory). However, the data stored in SRAM or DRAM will disappear when the system power is turned off, and cannot be stored continuously. Therefore, in an application that needs to keep saving data after the system power is turned off, it is necessary to use a memory device that can continue to keep the stored data after the power supply is stopped. Non-volatile memory (NVM, nonvolatile memory) is a memory device that can satisfy this application. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C5/14
CPCG11C5/147
Inventor 黄志仁
Owner 2X MEMORY TECH CORP
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