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Radar pulse signal sampling jitter real-time elimination processing method

A signal sampling and radar pulse technology, applied in the field of real-time elimination of radar pulse signal sampling jitter, can solve problems such as radar shaking, and achieve the effects of optimized design, easy operation, and improved anti-interference and stability.

Active Publication Date: 2019-06-18
10TH RES INST OF CETC
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Problems solved by technology

[0006] The task of the present invention is to propose a real-time elimination processing method for radar pulse signal sampling jitter from the perspective of data processing without increasing the radar system architecture and hardware, which can significantly reduce the phase noise caused by radar pulse signal sampling jitter. Deterioration and loss of signal-to-noise ratio, solve a series of problems in real time, such as radar altimetry jumping caused by sampling jitter, SAR image azimuth shake, defocus problem, single pulse image Doppler domain shake and ranging jump, etc., to achieve the goal precise imaging and stable tracking

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Embodiment Construction

[0020] refer to figure 1 , figure 2 . In an optional embodiment, the real-time elimination processing method of radar pulse signal sampling jitter needs to be implemented in CPLD or field programmable gate array FPGA. In CPLD or Field Programmable Gate Array FPGA, design frequency division clock generation module, pulse phase acquisition and storage module, system clock and sampling pulse phase relationship judgment module, sampling signal delay and output module; after system clock input, frequency division clock The generation module generates the frequency-divided clock, and the pulse phase acquisition and storage module simultaneously samples the input trigger signal Trig_IN at the same time, and the value of the trigger signal after being sampled by the system clock is stored in a 15-bit system clock shift register, and after frequency division The values ​​after clock sampling are stored in a 4Bit frequency-division clock shift register; when the value stored in the ...

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Abstract

The invention provides a radar pulse signal sampling jitter real-time elimination processing method and aims to solve image jitter and distance shake caused by sampling jitter. The method is characterized in that a pulse phase acquisition and storage module, a system clock and sampling pulse phase relationship decision module and a sampling signal delay and output module are designed in FPGA; values after frequency division clock sampling respectively pass through a shift register; the trigger signal values acquired by a frequency division clock in the shift registers are respectively read bythe system clock and sampling pulse phase relationship decision module, according to the combination relationship of the values in the shift registers, the system clock and sampling pulse phase relationship is determined, and the determination result is sent to the sampling signal delay and output module; appropriate output delay is looked up in a lookup table by the sampling signal delay and output module, output pulses strictly synchronized with the system clock are generated, and thereby the radar pulse signal sampling jitter is eliminated in real time.

Description

technical field [0001] The invention relates to a real-time elimination processing method for radar pulse signal sampling jitter. Background technique [0002] In the radar system, the timing generation module usually generates various timing signals in the system, such as pulse repetition period PRT signal, cyclic pulse accumulation CPI signal, AD sampling synchronization signal, channel pulse generation signal LFM_ and other pulse signals. These signals pass through Media such as cables and printed boards are transmitted to each processing module in the system, so that they can work together according to a unified sequence. Pulse-to-pulse phase measurement accuracy is generally an important specification for advanced radar systems. Along with the need to accurately measure pulse frequency, the accuracy of pulse-to-pulse phase measurement depends on four key factors: phase noise, overall measurement time, pulse edge definition and measurement point, and signal-to-noise rat...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01S7/28G01S13/00
CPCY02A90/10
Inventor 纪斌王礼麒熊辉付连庆
Owner 10TH RES INST OF CETC
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