Semiconductor integrated circuit with HKMG

Abstract

The invention discloses a semiconductor integrated circuit with an HKMG. The semiconductor integrated circuit comprises a semiconductor device and an FDSOI substrate structure, wherein the semiconductor device is formed on the FDSOI substrate, and the magnitude of the work function of the HKMG work function layer trends to the intermediate value of forbidden bandwidth of a semiconductor layer on the top; and the FDSOI substrate structure is provided with an structure for adjusting the threshold voltage of the semiconductor device. The structure for adjusting the threshold voltage of the semiconductor device comprises an inversion channel doping structure and a substrate bias applying structure. The threshold voltage of the semiconductor device is adjusted through the structure for adjusting the threshold voltage of the semiconductor device, the influence of the power function layer on the threshold voltage of the semiconductor device is cancelled, and the semiconductor device of whichthe threshold voltage meets the requirement is formed. The HKMG structures of a PMOS tube and an NMOS tube can be uniform, and a metal gate boundary effect generated when the HKMG of the PMSO tube isdifferent from that of the NMOS tube can be eliminated.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to a semiconductor integrated circuit with HKMG. Background technique [0002] HKMG has a gate dielectric layer with a high dielectric constant (HK) and a metal gate (MG), so it is usually abbreviated as HKMG in the art. Such as figure 1 As shown, it is the layout of the half-bit cell structure of the existing SRAM with HKMG; as figure 2 shown, is the existing along figure 1 The cross-sectional structure diagram of two adjacent first PMOS transistors 302 and second NMOS transistors 301 on line AA in the figure, the existing SRAM cell structure with HKMG SRAM includes two adjacent shared metal gates 109 of the first A PMOS transistor 302 and a second NMOS transistor 301, the HKMG of the first PMOS transistor 302 includes a gate dielectric layer and a metal gate 109, and there is a first work function layer 106 and a second metal gate between the gate dielectric layer and the ...

AI Technical Summary

Problems solved by technology

However, the separation of the work function layers of the PMOS transistor and the NMOS transistor cannot avoid the above-mentioned metal gate boundary effect.

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