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Semiconductor device and method for manufacturing semiconductor device

一种半导体、层叠体的技术,应用在半导体/固态器件制造、半导体器件、电气元件等方向,能够解决p型GaN难以抵挡工艺损伤等问题

Active Publication Date: 2018-11-09
MITSUBISHI ELECTRIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This is because p-type GaN is difficult to withstand process damage

Method used

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  • Semiconductor device and method for manufacturing semiconductor device
  • Semiconductor device and method for manufacturing semiconductor device
  • Semiconductor device and method for manufacturing semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0070] (summary of structure)

[0071] figure 1 It is a cross-sectional view schematically showing the structure of a semiconductor device (MOSFET) 91 according to this embodiment. The outline of the structure of the semiconductor device 91 will be described in (1) to (5) below.

[0072] (1) The semiconductor device 91 has a semiconductor substrate (epitaxial substrate) 31, a first insulating layer 41, a second insulating layer 6, a laminated body 51, an n-type contact layer 12, a source electrode portion 14, a drain electrode 15, and a gate insulating film. 16 and the gate electrode 61. The semiconductor substrate 31 has a first surface (lower surface) P1 and a second surface P2 (upper surface) opposite to the first surface P1. The first insulating layer 41 is provided on the second surface P2 of the semiconductor substrate 31 and has an opening OP partially exposing the second surface P2. The second insulating layer 6 is provided on the second surface P2 of the semicondu...

Embodiment approach 2

[0156] Figure 27 It is a cross-sectional view schematically showing the structure of a MOSFET (semiconductor device) 92 according to this embodiment. MOSFET91( figure 1 : Embodiment 1) tends to increase the total thickness of the epitaxially grown layers. This is advantageous for obtaining a high withstand voltage, but on the other hand, since the resistance of the drift layer is high, the on-resistance tends to become high. Therefore, when priority is given to reducing the on-resistance, it is conceivable to reduce the drift layer resistance by omitting the bottom n-type epitaxial layer 5 of the MOSFET 91 like the MOSFET 92 . Accordingly, on-resistance can be reduced.

[0157] In the manufacturing method of MOSFET 92, the formation process of bottom n-type epitaxial layer 5 is omitted ( image 3 ). The process can thus be simplified. In addition, accompanying this omission, instead of the step of forming the second insulating layer 6 ( Figure 4 as well as Figure 5 ...

Embodiment approach 3

[0161] (summary of structure)

[0162] Figure 28 It is a cross-sectional view schematically showing the structure of the semiconductor device (diode) 93 of this embodiment. The outline of the structure of the semiconductor device 93 will be described in (1) below.

[0163] (1) The semiconductor device 93 has the semiconductor substrate (epitaxial substrate) 31 , the insulating layer 42 , the laminate 53 , the n-type barrier layer 12D, the anode electrode 25 and the cathode electrode 24 . The semiconductor substrate 31 has a first surface (lower surface) P1 and a second surface (upper surface) P2 opposite to the first surface P1. The insulating layer 42 is provided on the second surface P2 of the semiconductor substrate 31 and has an opening OP partially exposing the second surface P2. The laminated body 53 has an n-type epitaxial layer 7D and a p-type epitaxial layer 9D in this order on the second surface P2 of the semiconductor substrate 31 . The n-type epitaxial layer 7...

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PUM

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Abstract

A first insulating layer (41) is provided on a second surface (P2) of a semiconductor substrate (31), and has an opening (OP). A second insulating layer (6) is provided on the second surface (P2), andis separated from the first insulating layer (41). A laminate (51) sequentially comprises, on the second surface (P2), a lateral n-type epitaxial layer (7) and first and second p-type epitaxial layers (8, 9), said layers being formed from a gallium nitride material. The laminate (51) has an outer side wall (SO) which has a portion that is formed of the second p-type epitaxial layer (9), an innerside wall (SI) which extends from the second insulating layer (6), and a top surface (ST). An n-type contact layer (12) is provided on the top surface (ST). A source electrode part (14) is in contactwith the n-type contact layer (12) on the top surface (ST), while being in contact with the second p-type epitaxial layer (9) on the outer side wall (SO). A gate insulating film (16) is provided on the inner side wall (SI).

Description

technical field [0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and more particularly, to a semiconductor device using a gallium nitride-based material and a method for manufacturing the semiconductor device. Background technique [0002] In recent years, development of semiconductor devices using wide bandgap semiconductors has been active. Gallium nitride (GaN)-based materials are particularly anticipated among wide bandgap semiconductors. Therefore, as techniques related to GaN-based materials, techniques for forming epitaxial layers and microfabrication techniques for processing epitaxial layers into desired shapes have been studied. [0003] According to Non-Patent Document 1, a selective growth technique for growing an epitaxial layer into a desired shape has been studied in consideration of application to optical semiconductor devices such as laser light and ultraviolet detectors. As a promising...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336H01L29/06H01L29/12H01L29/861H01L29/868H01L29/872
CPCH01L29/78H01L29/861H01L29/868H01L29/872H01L29/06H01L29/12H01L29/2003H01L29/7789H01L29/7813H01L29/7802H01L29/4236H01L29/0657H01L29/66734H01L29/045H01L21/0254H01L21/02636H01L21/26546H01L21/28264H01L21/30625H01L29/0649H01L29/0692H01L29/0847H01L29/1095H01L29/36H01L29/41758H01L29/42364H01L29/42376H01L29/513H01L29/517H01L29/66212H01L29/66522
Inventor 林田哲郎南条拓真
Owner MITSUBISHI ELECTRIC CORP
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