LDMOS static protection device

An electrostatic protection and device technology, applied in the field of LDMOS electrostatic protection devices, which can solve problems such as electrostatic discharge capacity limitations

Active Publication Date: 2018-11-02
上海昆昂电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In view of the above situation, it is necessary to provide an LDMOS electrostatic protection device to solve the problem that the electrostatic discharge capability is limited

Method used

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  • LDMOS static protection device
  • LDMOS static protection device
  • LDMOS static protection device

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Embodiment Construction

[0019] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings. Several embodiments of the invention are shown in the drawings. However, the present invention can be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be thorough and complete.

[0020] It should be noted that when an element is referred to as being “fixed on” another element, it may be directly on the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or intervening elements may also be present. As used herein, the terms "vertical," "horizontal," "left," "right," "upper," "lower," a...

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PUM

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Abstract

The invention provides an LDMOS static protection device. The LDMOS static protection device comprises a substrate, wherein a deep N trap is arranged on the substrate; the deep N trap is internally provided with a first P trap and a first N trap, the first P trap is internally provided with a first N+ injection area, a second N+ injection area and a first P+ injection area, and the first N trap isinternally provided with a third N+ injection area, a second P+ injection area and a third P+ injection area; the second N+ injection area, the first P trap and the first N trap form a first NPN structure, the first P trap, the first N trap and the third P+ injection area form a first PNP structure, and the first NPN structure and the first PNP structure form a first SCR path; the first N+ injection area, the first P trap and the second N+ injection area form a second NPN structure, the third P+ injection area, the first N trap and the second P+ injection area form a second PNP structure, andthe second NPN structure and the second PNP structure form a second SCR path. According to the LDMOS static protection device, one SCR path is added, so that the electrostatic discharge capacity is improved.

Description

technical field [0001] The invention relates to the technical field of electrostatic protection for integrated circuits, in particular to an LDMOS electrostatic protection device. Background technique [0002] LDMOS (Laterally Diffused Metal Oxide Semiconductor, Laterally Diffused Metal Oxide Semiconductor) devices are widely used in power management chips, such as DC-DC converters, AC-DC converters, and the like. With the development of integrated circuits in the direction of high speed and high voltage, the weak electrostatic protection ability of LDMOS devices has become a bottleneck restricting its development. Therefore, how to improve the electrostatic protection capability (Electro-Static discharge, ESD) of the LDMOS device has become a research hotspot. [0003] In a traditional LDMOS electrostatic protection device, a diode is usually introduced to enhance its electrostatic discharge capability, but its trigger voltage is low and its area is large, which will affec...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02
CPCH01L27/0262
Inventor 陈卓俊曾云彭伟金湘亮吴志强
Owner 上海昆昂电子科技有限公司
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