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High-end fault-tolerant computer node interconnection system and realization method

A high-end fault-tolerant, computer technology, applied in the computing field to improve access efficiency, reduce communication delay, and reduce costs

Inactive Publication Date: 2018-09-07
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0002] As Moore's Law continues to slow down, the development of microprocessor technology is facing more and more challenges, and the multiprocessor composed of multiple processors interconnected greatly accelerates the improvement of the overall performance of the computer, but by increasing the parallelism to improve Performance also brings a series of problems

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  • High-end fault-tolerant computer node interconnection system and realization method

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Embodiment Construction

[0018] The invention provides a method for realizing the interconnection of high-end fault-tolerant computer nodes. According to the actual application situation, the CPU inside the single node is interconnected by the interface of the node control chip, and then the single node is interconnected by the interface of the node control chip to form a multi-channel system. Multi-channel systems are grouped, and each group of multi-channel systems is interconnected using the interface of the node control chip. According to the actual application situation, multiple groups of multi-channel systems are divided into complete systems, and the interface of the node control chip is used to complete the interconnection of the complete system.

[0019] At the same time, a high-end fault-tolerant computer node interconnection system corresponding to the above method is provided. According to the actual application situation, the CPU inside the single node is interconnected by the interface of...

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Abstract

The invention discloses a high-end fault-tolerant computer node interconnection system and a realization method, and relates to the technical field of computers. The method comprises the following steps of: interconnecting CPUs in single nodes by utilizing an interface of a node control chip according to a practical application condition, and interconnecting the single nodes by utilizing the interface of the node control chip so as to form a multi-path system; dividing the multi-path system into groups, wherein the groups are interconnected by utilizing the interface of the node control chip;dividing the multiple groups of multi-path systems into turnkey systems according to the practical application condition; and interconnecting the turnkey systems by utilizing the interface of the nodecontrol chip. According to the system and the method, the inter-node communication bandwidth demand caused by the scale enlargement of high-end fault-tolerant computers is satisfied, and nodes can beinterconnected through high-speed full-duplex interfaces and can be transmitted through optical fibers without being forwarded by network controllers, so that the communication delay is reduced and the system performance is greatly improved.

Description

technical field [0001] The invention discloses a high-end fault-tolerant computer node interconnection system and an implementation method, and relates to the technical field of computing. Background technique [0002] As Moore's Law continues to slow down, the development of microprocessor technology is facing more and more challenges, and the multiprocessor composed of multiple processors interconnected greatly accelerates the improvement of the overall performance of the computer, but by increasing the parallelism to improve Performance also brings a series of problems. Large-scale multiprocessors use multiple CPUs and memories and distribute them across multiple nodes. There are often contradictions between the network overhead and bandwidth performance of multiple nodes. A high-end fault-tolerant computer node interconnection system and implementation method proposed by the present invention not only match the network bandwidth with the communication requirements in th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/173H04B10/25
CPCG06F15/17356H04B10/2589
Inventor 邹晓峰刘同强周玉龙
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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