Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Ultra-low-power-consumption asynchronous successive approximation register type analog-to-digital converter

An asynchronous successive approximation, analog-to-digital converter technology, applied in the direction of analog-to-digital converter, analog-to-digital conversion, code conversion, etc., can solve the problems of low linearity and accuracy, high power consumption, large area and so on

Active Publication Date: 2018-08-24
XIDIAN UNIV
View PDF7 Cites 10 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The object of the present invention is to provide a 10-bit ultra-low power consumption asynchronous successive approximation register type analog-to-digital converter applied to wireless sensor network chips, aiming at solving the problem of high power consumption of the existing successive approximation register type analog-to-digital converters Large, low linearity and accuracy issues

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Ultra-low-power-consumption asynchronous successive approximation register type analog-to-digital converter
  • Ultra-low-power-consumption asynchronous successive approximation register type analog-to-digital converter
  • Ultra-low-power-consumption asynchronous successive approximation register type analog-to-digital converter

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0038] In order to make the object, technical solution and advantages of the present invention more clear, the present invention will be further described in detail below in conjunction with the examples. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0039] The present invention aims at the shortcomings of the traditional ultra-low power asynchronous successive approximation register type analog-to-digital converter, and makes improvements in the prior art, that is, the present invention provides a 10-bit ultra-low power consumption device applied to wireless sensor network chips Asynchronous successive-approximation register-based analog-to-digital converters achieve nanowatt-level power consumption while improving linearity.

[0040] The application principle of the present invention will be described in detail below in conjunction with the accompanying drawings.

[...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention belongs to the technical field of low-power-consumption integrated circuits, in particular to an ultra-low-power-consumption asynchronous successive approximation register type analog-to-digital converter. The analog-to-digital converter comprises two bootstrap sampling and holding switches S / H, four connection switches, two binary weighted capacitor DAC networks, a sub-threshold dynamic comparator and an asynchronous SAR control logic circuit, wherein the bootstrap sampling and holding switches S / H are used for sampling an analog differential input signal to upper pole plates ofthe two binary weighted capacitor DAC networks; and the four connection switches are controlled by the asynchronous SAR control logic circuit to determine a connection relationship between the upperpole plates of highest location capacitors of the binary weighted capacitor DAC networks, i.e. whether the upper pole plates of the highest location capacitors are connected with upper pole plates ofother non-highest location capacitors or connected with the ground.

Description

technical field [0001] The invention belongs to the technical field of low-power integrated circuits, and in particular relates to a 10-bit ultra-low power asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) applied to a wireless sensor network chip. Background technique [0002] As CMOS process geometries shrink, it becomes increasingly difficult to improve the performance of analog circuits operating at ultra-low power and ultra-low power consumption. Successive approximation register (SAR) analog-to-digital converters (ADCs) have recently become one of the most popular converters in ultra-low power Wireless sensor network chips or portable biomedical devices. In these energy-constrained applications, systems and circuits can often be powered by energy-constrained batteries or small-sized energy harvesting devices, which result in limited lifetimes. Therefore, it is essential to design energy-efficient system structures and circuits in ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H03M1/00H03M1/12H03M1/46
CPCH03M1/002H03M1/1245H03M1/462H03M1/466
Inventor 蔡觉平陈腾腾辛昕温凯林杨启迪韩旭
Owner XIDIAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products