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A Hardware System for Fast Realization of 8x8dct Transformation

A hardware system, 8x8dct technology, applied in the direction of electrical components, image communication, digital video signal modification, etc., can solve the problems of hardware design parallelism limit, etc., to reduce algorithm complexity, avoid transposition operation, and reduce hardware area Effect

Active Publication Date: 2020-08-07
FUZHOU UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage is that the introduction of the butterfly algorithm limits the parallelism of the hardware design, and the row-column decomposition algorithm requires a transposition of the coefficient matrix

Method used

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  • A Hardware System for Fast Realization of 8x8dct Transformation
  • A Hardware System for Fast Realization of 8x8dct Transformation
  • A Hardware System for Fast Realization of 8x8dct Transformation

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Embodiment Construction

[0031] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0032] Such as figure 1 As shown, this embodiment provides a hardware system for quickly implementing 8x8DCT transformation, including a control module, a DCT coefficient module, a data transmission module, a PE array module, and a residual storage module;

[0033] The DCT coefficient module is connected to the control module and the data transmission module, and the DCT coefficient module receives the clock-synchronized DCT coefficient sent from the outside, and performs data circulation and output operations under the control of the control module;

[0034] The data transmission module is connected to the control module, the DCT coefficient module, and the PE array module, and the data transmission module receives the coefficient output by the DCT coefficient module, and makes the DCT coefficient module transmit the coefficient under the control of th...

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Abstract

The invention relates to a hardware system for quickly implementing 8*8 DCT transform, comprising a control module, a DCT coefficient module, a data transfer module, a PE array module, and a residualmemory module. The signals obtained by the control module from a frequency converter are used to control the coordinated operation of each of the modules. The DCT coefficient module acquires the inputDCT coefficients and inputs the same to the data transfer module after the self-loop. The data transfer module communicates the correct transfer of data between the DCT coefficient module and the PEarray module. The PE array module receives the DCT coefficients and residual values, performs arithmetic operations in each PE unit to obtain intermediate values and result values, and performs sub-loops of the residuals and intermediate values throughout the whole module. The main function of the residual memory module is to receive external incoming residual values and to map the values into thePE array module all at once. The invention is capable of avoiding the transposition operation of the conventional DCT transform algorithm and reducing the hardware implementation period, such that the row and column transformation modules are capable of sharing a hardware resource, so as to reduce the hardware area.

Description

technical field [0001] The invention relates to the field of DCT hardware design, in particular to a hardware system for quickly realizing 8x8DCT transformation. Background technique [0002] In January 2010, ITU-T VCEG (Video Cding Experts Group) and ISO / IEC MPEG (Moving Picture Experts Group) jointly established JCT-VC (Joint Collaborative Team on Video Coding), responsible for the unified development of next-generation coding standards HEVC / H. 265. HEVC has high compression performance in video compression. Compared with H.264 / AVC, under the same picture quality, the bit rate of HEVC encoded video will be reduced by half. The reason why HEVC has such a high compression effect is at the cost of increased coding complexity. In fact, its coding complexity is 2-4 times that of H.264. Among them, the DCT transform is a module that is not only complicated in the encoding process, but also consumes a lot of encoding time. [0003] In recent years, many fast algorithms for cal...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N19/625H04N19/423
CPCH04N19/423H04N19/625
Inventor 吴林煌潘苏文陈志峰郑明魁董力菡郑静宜杨秀芝
Owner FUZHOU UNIV
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