Digital pre-distortion adaptive processing method

A technology of digital pre-distortion and processing method, which is applied to improve amplifiers to reduce nonlinear distortion, electrical components, amplifiers, etc., and can solve the problem that FPGA cannot implement high-order LMS algorithms, reduce the overall efficiency of transmitters, and consume multiplier resources. It can save multiplier resources, avoid errors, and reduce computing power consumption.

Inactive Publication Date: 2018-05-08
INST OF ELECTRONICS ENG CHINA ACAD OF ENG PHYSICS
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Problems solved by technology

[0009] (1) The LMS algorithm based on the MP model has high-order items in the coefficient calculation. With the increase of the order, the resource consumption of the multiplier is large, even exceeding the multiplier resources in the FPGA, and the FPGA cann...

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  • Digital pre-distortion adaptive processing method

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Embodiment 1

[0075] As a preferred embodiment of the present invention, with reference to the attached Figure 1-3 , this example discloses:

[0076] A digital predistortion adaptive processing method, comprising the following steps:

[0077] Step A, obtaining the feedback signal y(n) of the RF power amplifier through the hardware feedback channel;

[0078] Step B, observe whether there is spectrum expansion in y(n), and judge whether it is linear. If the spectrum of y(n) does not expand, the linear effect converges, indicating that the current DPD coefficients are convergent, and do not need to be updated, and directly enter step G; If the spectrum of y(n) is expanded, nonlinear distortion occurs, and the DPD coefficients do not converge, and enter step C;

[0079] Step C, start the LMS coefficient update module, update the LMS coefficient according to the error of the input signal x(n) and the output signal y(n), and use the LMS algorithm to solve the model coefficient;

[0080] Step ...

Embodiment 2

[0085] As another preferred embodiment of the present invention, with reference to the attached Figure 1-3 , this example discloses:

[0086] A digital predistortion adaptive processing method, comprising the following steps:

[0087]Step A, obtain the feedback signal y(n) of the RF power amplifier through the hardware feedback channel, expressed as:

[0088]

[0089] Among them, x(n) and y(n) are the input and output of the model respectively, a mk is the coefficient of the model, K and M are the nonlinear order and memory depth of the model respectively;

[0090] Step B, observe whether there is spectrum expansion in y(n), and judge whether it is linear. If the spectrum of y(n) does not expand, the linear effect converges, indicating that the current DPD coefficients are convergent, and do not need to be updated, and directly enter step G; If the spectrum of y(n) is expanded, nonlinear distortion occurs, and the DPD coefficients do not converge, and enter step C;

[...

Embodiment 3

[0102] As another preferred embodiment of the present invention, with reference to the attached Figure 1-3 , this embodiment discloses:

[0103] A digital predistortion adaptive processing method, comprising the following steps:

[0104] Step A, obtain the feedback signal y(n) of the RF power amplifier through the hardware feedback channel, and use the general memory polynomial model (GMP) model to express as:

[0105]

[0106] Among them, x(n) and y(n) are the input and output of the model respectively, a mk , b mlk 、c mlk is the coefficient of the model, K a ,K b ,K c and M a , M b , M c are the nonlinear order and memory depth of the model, respectively, L b and L c Respectively, the lag memory effect and the lead memory effect of the model;

[0107] Step B, observe whether there is spectrum expansion in y(n), and judge whether it is linear, if the spectrum of y(n) does not expand, then the linear effect converges, indicating that the current DPD coefficient...

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Abstract

The invention discloses a digital pre-distortion adaptive processing method, and relates to the technical field of wireless communication system signal processing. According to the method, in an LMS coefficient updating algorithm, magnitude high order terms are mapped into a lookup table, errors caused by the quantification bit width and the bit cut effect during FPGA fixed-point operation are reduced, then same product terms of factors are calculated step by step, multiplier resources consumed by the coefficient updating algorithm are reduced, and then the power consumption of an FPGA is reduced.

Description

technical field [0001] The present invention relates to the technical field of wireless communication system signal processing, and more specifically relates to a digital predistortion adaptive processing method. Background technique [0002] In modern communication systems, spectrum resources are becoming more and more crowded. In order to improve frequency efficiency, high-order modulation schemes and multi-carrier signal schemes are used more and more widely. However, the signal envelope of this system is non-constant and has a high peak-to-average-power PAPR (Peak-to-average-power, PAPR), which aggravates the contradiction between the linearity and efficiency of the power amplifier. In order to improve the efficiency of the power amplifier, the power amplifier often works at the saturation point, which will cause the spectrum expansion of the signal, interfere with the normal transmission of adjacent channel signals, and deteriorate the error vector magnitude EVM (Error ...

Claims

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Application Information

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IPC IPC(8): H03F1/32
CPCH03F1/3241
Inventor 张祺杨大龙刘友江
Owner INST OF ELECTRONICS ENG CHINA ACAD OF ENG PHYSICS
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