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Semiconductor structure and manufacturing method thereof

A manufacturing method, semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of poor passivation layer formation quality, achieve the effect of improving formation quality and reducing fracture

Active Publication Date: 2017-11-14
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, the formation quality of the prior art passivation layer is poor

Method used

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  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

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Embodiment Construction

[0030] The formation quality of the passivation layer in the prior art is poor, and the reason is analyzed in combination with the manufacturing method of the prior art semiconductor structure. Combined reference Figure 1 to Figure 5 , Shows a schematic structural diagram corresponding to each step in an embodiment of a manufacturing method of a prior art semiconductor structure.

[0031] reference figure 1 , A substrate 100 is provided, a top metal layer 110 is formed on the surface of the substrate 100, and a first opening 111 exposing the substrate 100 is formed in the top metal layer 110.

[0032] reference figure 2 A bottom passivation layer 121 is formed on the substrate 100 at the bottom of the first opening 111, and the bottom passivation layer 121 also covers part of the top metal layer 110 on both sides of the first opening 111.

[0033] reference image 3 , Forming a conductive film 130 covering the top metal layer 110 and the bottom passivation layer 121.

[0034] refere...

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Abstract

The invention provides a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the steps of: providing a substrate; forming a top metal layer having a first opening on the substrate; forming a first bottom passivation layer positioned on the substrate at the bottom part of the first opening, and a second bottom passivation layer positioned on the top metal layer and separated from the first bottom passivation layer; forming a conductive layer covering the top metal layer, the first bottom passivation layer and the second bottom passivation layer, wherein the conductive layer has a second opening, and the side wall of the second opening is level with the side wall of the first bottom passivation layer; and forming a top passivation layer on the bottom part and side wall of the second opening and part of the conductive layer. Through forming the first bottom passivation layer and the second bottom passivation layer, the side wall of the second opening in the conductive layer is level with the side wall of the first bottom passivation layer, thus the conductive layer has no corners in the top part corner region of the first bottom passivation layer, and the fracture problem of a top passivation layer in the top part corner region because the top passivation layer bears overlarge stress is reduced.

Description

Technical field [0001] The present invention relates to the field of semiconductors, in particular to a semiconductor structure and a manufacturing method thereof. Background technique [0002] In the manufacturing process of semiconductor structures, passivation of the surface of semiconductor structures is one of the key technologies. By forming a passivation layer on the surface of the semiconductor structure, various charges in the internal oxide layer of the semiconductor structure can be reduced, the semiconductor structure's ability to block ion contamination is enhanced, and the interconnection of the internal devices of the semiconductor structure and the electrical characteristics of the surface of the semiconductor structure can be protected , Prevent the device of the semiconductor structure from mechanical damage or chemical damage. [0003] However, the formation quality of the passivation layer in the prior art is poor. Summary of the invention [0004] The problem ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/56H01L23/31
Inventor 王晓东
Owner SEMICON MFG INT (SHANGHAI) CORP
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