Semiconductor chip aging test device and method

Abstract

The invention provides a semiconductor chip aging test device and method. The device comprises an aging test board and a control circuit having a multiplexer and multiple high frequency crystal oscillators, when a signal input end of the multiplexer is connected with the high frequency crystal oscillators, a signal control end of the multiplexer is in gating connection with the signal input end, a signal output end of the multiplexer outputs a test signal which is loaded to a chip socket, and an aging test on a semiconductor chip is carried out. The device is advantaged in that a disadvantage of medium / high frequency signal transmission distortion in the prior art can be solved, selective input of multiple sets of signals having different frequencies is realized, and test accuracy and test efficiency are improved.

Description

technical field [0001] The invention relates to the field of semiconductor chip testing, in particular to a semiconductor chip aging testing device and method. Background technique [0002] The reliability test (HTOL, Endurance) and other durability aging tests of semiconductor chips in the prior art adopt the basic function test (Gross Function test), that is, the operating frequency of the chip will be reduced below 10Mhz, because the When the burn-in board transmits the high-frequency signal of the high-frequency signal source, the impedance of the high-frequency signal source does not match, which will cause distortion of the transmission line, resulting in abnormal high-frequency signal actually reaching the chip. figure 1 It is a structural schematic diagram of a test burn-in board of a semiconductor chip burn-in test device in the prior art, wherein the test burn-in board 10 includes a printed circuit board body 11 , a chip socket 12 , a signal transmission line 13 , ...

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Problems solved by technology

figure 2 It is a test signal schematic diagram of the test burn-in board 10 of the burn-in test device of the semiconductor chip of the prior art; figure 1 and figure 2 It can be seen that when the high-frequency signal of the high-frequency signal source is loaded to the semiconductor chip of the chip socket through the golden finger 14 of the test burn-in board 10, since the high-frequency signal source is input to the semiconductor chip installed in the chip socket through the signal transmission line 13, the high-frequency When the signal source is inputting frequency signals, since the impedance of the test burn-in board is fixed, when the high-frequency signal source loads different frequency signals, there will be frequency distortion, such as figure 2 As shown, the loaded high-frequency signal (frequency signal close to the gold finger direction) is a square wave signal, and the high and low levels of the high-frequency signal input to the chip socket appear peak distortion (frequency signal on the signal transmission line 13), thus Affects the accuracy of the burn-in test of semiconductor chips

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