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Implementation method for digital channelized filter bank

A digital channelization and filter bank technology, applied in the field of communication, can solve the problems of consumption, huge hardware resources, waste of hardware resources, etc., and achieve the effects of low resource consumption, low calculation amount, and high adaptability

Active Publication Date: 2017-10-10
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The advantage of this traditional digital channelization technology is that the filter structure of the polyphase filtering part and the design and allocation of filter coefficients are relatively simple, but the disadvantage is that the input data needs to be filtered by the polyphase filter. One channel of serial data is divided into two channels of parallel data to be processed separately, so two sets of the same processing modules are required, which doubles the amount of calculation and wastes hardware resources. When the required frequency resolution is very high, the required When the number of divided sub-channels is large, this traditional digital channelization implementation technology will require a large number of multiplication and addition operations, while consuming huge hardware resources

Method used

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  • Implementation method for digital channelized filter bank
  • Implementation method for digital channelized filter bank
  • Implementation method for digital channelized filter bank

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Embodiment 1

[0056] Based on the digital channelization implementation technology of the present invention and the traditional digital channelization implementation technology, at the sampling rate f s =500MHz, frequency resolution △=15.7MHz, the sub-channels are evenly arranged and 50% overlapped, the comparison of hardware resource consumption.

[0057] Consider a single-frequency cosine input signal with a frequency of f=100MHz, assuming that the ADC at the receiving end is 18 bits, and the sampling rate is f s =500MHz, sampling period T s =1ns, the number of sampling points is D=16384.

[0058] The FPGA chip model used in this embodiment is: Kintex7-XC7K325T-FFG900.

[0059] The system working clock is: 125MHz.

[0060] In Embodiment 1, the hardware resource consumption based on the digital channelization realization technology of the present invention and the traditional digital channelization realization technology is measured by the resource consumption of the FPGA chip.

[0061...

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Abstract

The invention belongs to the technical field of communication, relates to an implementation method for a digital channelized filter bank and provides a digital channelized filter bank implementation technology based on low computation burden, low resource consumption and high adaptability of a multi-channel filter and application thereof in implementation of digital channelization. When the required frequency resolution is changed, only coefficient of a lowpass prototype filter needs to be calculated again, and a new filter coefficient is reallocated into a multi-channel filter bank of the original structure according to multi-phase decomposition and multichannel filter theories, and an expression and an implementation structure do not need to be deduced again, so that the implementation method provided by the invention is applicable to platforms such as FPGA and DSP, and digital channelization processing is realized.

Description

technical field [0001] The invention belongs to the technical field of communication, and relates to a high-efficiency digital channelization filter bank realization technology. Background technique [0002] With the continuous development of radio technology and the increasingly fierce electronic countermeasures, the electromagnetic environment faced by electronic reconnaissance has become more and more complex. In order to be able to detect more effective information, the electronic reconnaissance receiver must have the characteristics of good frequency resolution, simultaneous multi-signal processing capability and wide frequency coverage. Because the analog reconnaissance receiver uses analog methods to process signals, it will not only bring nonlinear distortion, but also cause temperature drift, DC level drift and temperature changes, and also have bulky, high manufacturing costs and poor reconnaissance accuracy And other issues. In contrast, the digital channelized ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/00H04B1/16H03H17/02
CPCH03H17/0201H04B1/001H04B1/16
Inventor 陶书豪甘露廖红舒
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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