Manufacturing method of semiconductor device

Abstract

The invention discloses a manufacturing method of a semiconductor device. Methods and structures for a two-step defect reduction bake followed by high temperature epitaxial layer growth are provided. In various embodiments, a semiconductor wafer is loaded into a processing chamber. When the semiconductor wafer is loaded in the processing chamber, a first pre-epitaxial layer (Pre-epitaxial Layer) deposition baking process is performed at a first pressure and a first temperature. In some examples, after the first pre-epitaxial layer deposition baking process, a second pre-epitaxial layer deposition baking process is performed at a second pressure and a second temperature. In some embodiments, the second pressure is different from the first pressure. For example, after the second pre-epitaxy layer deposition baking process, and while at the growth temperature, the precursor gas is introduced into the processing chamber to deposit the epitaxial layer on the semiconductor wafer.

Description

technical field [0001] The present invention relates to a manufacturing method of a semiconductor device, in particular to an epitaxial growth method and its structure. Background technique [0002] The electronics industry has gone through a period of increasing demand for smaller and faster electronic devices that can simultaneously support a large number of ever-increasing complex and complex functions. Accordingly, in the semiconductor industry, there is a continuing trend to manufacture low cost, high performance and low power integrated circuits. To date, most of these goals have been achieved by reducing the size of semiconductor integrated circuits (ie, minimizing feature size), thereby improving production efficiency and reducing associated costs. However, this scaling also adds complexity to the semiconductor manufacturing process. Accordingly, to achieve continued advances in semiconductor integrated circuits and devices, similar advances in semiconductor manufa...

AI Technical Summary

Problems solved by technology

However, in at least some known processes, the number and / or size of epitaxial layer defects left after epitaxial layer growth (eg, formed during epitaxial layer growth) may not be suitable for use in advanced semiconductor devices and circuit fabrication

In some instances, non-uniformity of epitaxially grown layers can also be problematic for device and / or circuit fabrication

[0004] Therefore, known techniques have not been proven to be completely satisfactory in all respects

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