Embedded packaging structure based on semiconductor chip packaging body and packaging method thereof
A technology of chip packaging and packaging structure, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc. It can solve the problems of insufficient welding precision, complex solder reflow process control, and hinder the development of miniaturization of semiconductor packaging devices, etc. problem, to achieve the effect of reducing the assembly area and greatly increasing the assembly area
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[0074] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.
[0075] The embedded package structure based on semiconductor chip package in a specific embodiment of the present invention, refer to figure 1 As shown, the embedded package structure specifically includes:
[0076] A circuit board 1, that is, a circuit carrier for packaging a semiconductor chip package, which has a first surface 11 and a second surface 12 oppositely arranged;
[0077] At least one opening or cavity 2 for accommodating a semiconductor chip package 3 provided in the circuit board 1;
[0078] a semiconductor chip package 3 disposed in the opening or cavity 2;
[0079] The packaging material 4 is at least used to cover the first s...
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