Substrate and its manufacturing method

A manufacturing method and substrate technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., to improve performance and reliability, and avoid defects

Active Publication Date: 2020-05-12
GUANGDONG GREATER BAY AREA INST OF INTEGRATED CIRCUIT & SYST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The invention provides a substrate and its manufacturing method to solve the problem in the prior art that it is difficult to form a high-quality oxide buried layer and its upper semiconductor layer on a semiconductor substrate at a lower cost

Method used

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  • Substrate and its manufacturing method
  • Substrate and its manufacturing method
  • Substrate and its manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0057] In this embodiment, the auxiliary substrate 100 and the supporting substrate 200 are bulk silicon substrates, the epitaxial layer 101 is a germanium layer, the passivation layer 102 is a hafnium oxide film, and the buried dielectric layer 201 is a silicon dioxide film, refer to Figure 3G As shown, the method includes:

[0058] Step S01, providing an auxiliary substrate 100 and a supporting substrate 200, the auxiliary substrate 100 includes at least an epitaxial layer 101 and a passivation layer 102 on the epitaxial layer 101, and the supporting substrate 200 includes at least a buried Dielectric layer 201, such as Figure 3A to Figure 3C mentioned.

[0059] In this embodiment, the auxiliary substrate 100 and the supporting substrate 200 are bulk silicon substrates, and the epitaxial layer 101 is a germanium layer with high carrier mobility to manufacture high-speed devices; the passivation layer 102 is a hafnium oxide high-k dielectric film; the buried dielectric l...

Embodiment 2

[0085] The substrate manufacturing method is as described in Embodiment 1, except that in this embodiment, the auxiliary substrate 100 is a silicon germanium substrate; the epitaxial layer 101 includes a buffer layer 1011 and a useful layer 1012; The passivation layer 102 is an aluminum oxide film with a thickness of 5-10 nm; the buried dielectric layer 201 is formed by thermal oxygen method, such as Figure 4A to Figure 4G shown.

[0086] Step S11, providing an auxiliary substrate 100 and a supporting substrate 200, the auxiliary substrate 100 includes at least an epitaxial layer 101 and a passivation layer 102 on the epitaxial layer 101, and the supporting substrate 200 includes at least a buried Dielectric layer 201, such as Figure 4A to Figure 4C shown.

[0087] In this embodiment, the auxiliary substrate 100 is a silicon germanium substrate, the supporting substrate 200 is a bulk silicon substrate, the epitaxial layer 101 includes a buffer layer 1011 and a useful layer...

Embodiment 3

[0101] The substrate manufacturing method is as described in Embodiment 1, the difference is that the epitaxial layer 101 is a germanium tin layer; the support substrate 200 is a sapphire substrate; the epitaxial layer 101 includes a buffer layer 1011, a useful layer 1012; the passivation layer 102 is an aluminum oxide film with a thickness of 5-10 nm; the auxiliary substrate 100 includes an epitaxial layer 101, a passivation layer 102 on the epitaxial layer 101, and the passivation Oxide substance layer 103 on layer 102, such as Figure 5A to Figure 5F shown.

[0102] Step S21, providing an auxiliary substrate 100 and a supporting substrate 200, the auxiliary substrate 100 includes at least an epitaxial layer 101 and a passivation layer 102 on the epitaxial layer 101, and the supporting substrate 200 includes at least a buried Dielectric layer 201, such as Figure 5A to Figure 5B shown.

[0103] In this embodiment, different from Embodiment 1, in addition to the epitaxial ...

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Abstract

The invention provides a substrate and a manufacturing method thereof. The manufacturing method comprises the following steps: providing an auxiliary substrate and a support substrate, wherein the auxiliary substrate at least comprises an epitaxial layer and a passivation layer on the epitaxial layer, and the support substrate at least comprises a buried dielectric layer; bonding the auxiliary substrate to the support substrate; removing the auxiliary substrate; and performing chemical-mechanical planarization (CMP) until the epitaxial layer reaches a specified thickness. Damage to the epitaxial layer in a bonding process can be lowered effectively through the passivation layer, so that a large quantity of defects generated in the epitaxial layer are overcome, and the performance and reliability of a device manufactured by the epitaxial layer are improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a substrate and a manufacturing method thereof. Background technique [0002] With the continuous development of the integrated circuit industry, how to reduce the substrate leakage current has increasingly become the focus of research. Among them, using a silicon-on-insulator (SOI) substrate, so that the formed semiconductor device is located on the insulator, and avoiding the leakage current between the semiconductor device and the substrate is recognized as the best way. [0003] In addition, with the continuous reduction of the size of semiconductor devices, it is necessary to improve the device performance by enhancing the channel carrier mobility, for example, by replacing silicon with semiconductor materials with high carrier mobility such as silicon germanium and germanium. Enhanced channel carrier mobility. Some people have proposed the structure of manufactu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762H01L27/12
CPCH01L21/76251H01L27/1203
Inventor 王桂磊亨利·H·阿达姆松罗军李俊峰赵超
Owner GUANGDONG GREATER BAY AREA INST OF INTEGRATED CIRCUIT & SYST
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