Method and system for extracting semiconductor defect level

Abstract

The invention provides a method and a system for extracting a semiconductor defect level. The method comprises steps: through a positive bias temperature instability test, the threshold voltage of an nMOS device after applying gate stress voltage and different gate recovery voltage is acquired; according to the shift of the threshold voltage of the nMOS device after applying the different gate recovery voltage relative to applying the gate stress voltage, the defect surface density of a gate dielectric layer corresponding to the different gate recovery voltage is acquired, and the corresponding relationship between the different gate recovery voltage and the defect surface density of the gate dielectric layer is acquired; the corresponding relationship between the different gate recovery voltage and a defect level is acquired; and the corresponding relationship between the defect surface density of the gate dielectric layer and the defect level is acquired. According to the method provided by the invention, the relationship between the defect level and the defect surface density of the gate dielectric layer can be extracted, and the device performance and the reliability can be improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method and system for extracting semiconductor defect energy levels. Background technique [0002] As the process nodes of semiconductor chips continue to decrease, the thickness of the gate oxide layer becomes thinner and thinner, and the reliability of the device is paid more and more attention; in addition, with the introduction of the gate oxide nitride process, the reliability of the device is particularly important. The Bias Temperature Instability (BTI) effect occupies the primary position in the reliability of the device. The BTI effect means that when a certain gate voltage is applied to the gate of the field effect transistor MOSFET, the performance of the device will occur under high temperature stress conditions. Significant degradation and reduced device lifetime are mainly manifested in the drift of threshold voltage, the drop of drive current and transc...

AI Technical Summary

Problems solved by technology

[0005] The present invention aims to solve the problem that the prior art cannot extract the defect energy level, defect surface density, and the relationship between the defect energy level and the defect surface density of the gate dielectric layer in nMOS devices, and provides a method for extracting semiconductor defect energy levels and systems to improve device performance and reliability

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