Load overcurrent protection circuit and load overcurrent protection method

Abstract

The invention provides a load overcurrent protection circuit. The load overcurrent protection circuit comprises a current sampling resistor, an amplifier, a comparator I, a timer, a self-locking control circuit and an electronic switch, wherein the current sampling resistor is connected with the electronic switch; the comparator I is connected with a reference source I; the amplifier amplifies the voltage of the current sampling resistor and transmits the voltage to the comparator I; the comparator I compares a voltage signal output by the amplifier with the reference source I; and the timer starts time delay timing if the voltage signal output by the amplifier is higher than the reference source I, the timer stops timing and the electronic switch normally switches on if the voltage signal output by the amplifier is lower than the reference source I in the time delay timing process, otherwise, the timer performs time delay timing to reach a set value, and the self-locking control circuit switches off the electronic switch and locks the off state of the electronic switch. The load overcurrent protection circuit solves the problems that the delayed time of overcurrent protection is short and an MOS tube is susceptible to burnout.

Description

technical field [0001] The invention belongs to the technical field of robot control, and in particular relates to a load overcurrent protection circuit and a load overcurrent protection method. The protection circuit of the invention also relates to a peak current shutdown circuit. Background technique [0002] The power management solutions introduced by chip manufacturers, such as TI's power management chip TPS2490 / TPS2491 and LINEARTECHNOLOGY's LT4363, both connect an electronic switch (MOS tube) and a sampling resistor in series to the positive line of the power bus, and connect a capacitor externally to the power management chip to set The delay time of the internal timer. The power management chip monitors the voltage drop on the sampling resistor and compares it with the internal reference source. When the voltage drop on the sampling resistor exceeds the reference source, the power management chip starts to adjust the gate voltage of the MOS tube. To limit the volta...

AI Technical Summary

Problems solved by technology

If the delay timer inside the chip is not used, as long as the voltage drop on the sampling resistor exceeds the reference value, the chip will quickly turn off the MOS tube, so that when the load has an overcurrent of hundreds of microseconds, the power management chip will still turn off The MOS tube is broken, which reduces the fault tolerance performance of the system

[0005] In summary, the disadvantages of this scheme are: 1. The delay time of overcurrent protection is short, and it is easy to burn out the MOS tube; 2. It lacks flexibility, and it is impossible to set different delays for load overcurrent and peak current. off time

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