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A DAC current source array arrangement method

A current source array and current source technology, applied in electrical components, physical parameter compensation/prevention, code conversion, etc., can solve problems such as the inability to eliminate the influence of second-order gradient errors, and achieve the effect of improving static performance

Inactive Publication Date: 2019-04-05
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Claims
  • Application Information

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Problems solved by technology

Although the latter reduces the influence of the second-order gradient error on the current source mismatch to a certain extent, it cannot eliminate the influence of the second-order gradient error on the current source mismatch

Method used

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  • A DAC current source array arrangement method
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Embodiment Construction

[0038] The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0039] Analyze the compensation of the linear gradient error and the second-order gradient error with respect to the arrangement scheme of the current source array:

[0040] (1) Calculation of gradient error

[0041] Linear gradient error ε l It can be calculated by the following formula:

[0042] ε l =g l *cosθ*x+g l *sinθ*y (1)

[0043] Among them, θ is the gradient angle, g l is the slope of the linear gradient.

[0044] Second order gradient error ε q It can be calculated by the following formula:

[0045] ε q =g q *(x 2 +y 2 )-a 0 (2)

[0046] Among them, g q and a 0 Both are constants, and their values ​​are mainly determined by the die-bonding technology.

[0047] (2) Gradient error compensation analysis

[0048] The N-bit current source array involved in the summary of the invention compensates the linear gradient error thr...

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Abstract

The invention belongs to the field of digital-to-analog conversion, in particular to a DAC current source array arrangement method. By constructing two types of fundamental matrices B m and C n (where m=0,1,2...,n=0,1,2,3), for an N-bit current source array, let N=4m+n, get the size of the corresponding m and n, thus select the matrix B m and C n to construct the current source array; first the matrix B m Each element b in m Replaced by the matrix R m , get the matrix F, where R m is the matrix C n with matrix 2 n b m The sum of ×I, I is 2 n ×2 n Then establish a rectangular coordinate system, place the matrix F in the first quadrant of the coordinate system, and get the matrix of the other three quadrants symmetrically about the x-axis, y-axis and the origin of the coordinates, and combine the matrices of the four quadrants together, get 2 3m+n+1 ×2 3m+n+1 Matrix A 4m+n , which corresponds to the arrangement of the N-bit current source array. The invention suppresses the influence of the gradient error on the current source mismatch, and improves the DNL and INL of the DAC.

Description

technical field [0001] The invention belongs to the field of digital-to-analog conversion, and in particular relates to a method for arranging a current source array in a current-steering DAC (Digital to Analog Converter, ie, a digital-to-analog converter), specifically a method for arranging a DAC current source array. Background technique [0002] With the rapid development of digital integrated circuit technology, the processing speed of digital signals is getting faster and faster. As the interface between the analog world and digital circuits, ADC (Analog to Digital Converter, namely analog-to-digital converter) and DAC have become one of the bottlenecks for system performance improvement. one. Therefore, high speed and high precision become the inevitable trend of DAC development. Since the output of the current steering DAC is a current signal, it can directly drive the load without adding an additional voltage buffer, so it is often used to achieve high-speed conver...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/08
CPCH03M1/0845
Inventor 宁宁耿鹏飞吴克军张浩于奇
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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