Method and device for ftl address mapping

Abstract

The embodiment of the present invention discloses a method and device for FTL address mapping, which relate to the field of communication technology and can solve the problem that the page mapping method in the prior art has a complex implementation process and high delay in the reading and writing process. The method of the present invention includes: dividing the logical address space into several logical address segments; establishing a virtual address space; establishing a page-level mapping table between the logical address segment and the virtual address segment corresponding to the logical address segment, and in the virtual address segment A block-level mapping table between the virtual block and the physical block in the physical address space mapped to the virtual block in the virtual address segment; when the host reads or writes data, obtains the target logical page address corresponding to the host read or write data; according to the target The logical page address and the page-level mapping table determine the target virtual page address; according to the target virtual page address and the block-level mapping table, determine the target physical page address. The present invention is applicable to FTL address mapping.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a method and device for FTL address mapping. Background technique [0002] Flash memory Flash-based SSD (Solid State Drive, solid state drive) is composed of host interface, processor, memory, channel controller and a set of flash memory Flash chips. The Flash chip includes multiple wafer dies, and each die includes multiple groups plane, each plane includes 2048 block blocks, and each block consists of 256 pages. The read and write granularity of the Flash chip is one page, and the erase granularity is one block. The read and write characteristics are write-after-erase after erasing, that is, the data on the chip cannot be updated in place. The read-write space presented by the SSD, that is, the space used by upper-level users, is the logical address space. The internal read-write space of the SSD is composed of Flash particles, which is called the physical address space...

AI Technical Summary

Problems solved by technology

[0004] Embodiments of the present invention provide a method and device for FTL address mapping, which can solve the problem that the page mapping method in the prior art has a complicated implementation process and leads to high delay in the read and write process

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