Filtering and anti-interference synchronizing scheme of voltage sample of electrical core

Abstract

The invention provides a filtering and anti-interference synchronizing scheme of voltage sample of an electrical core. A multilevel filter circuit is included, the input end of the multilevel filter circuit is connected with the output end of an electrical core module group, and the output end of the multilevel filter circuit is connected with the sampling end of a sampling chip; and voltage signals of the output end of the electrical core module group are transmitted to the multilevel filter circuit, the multilevel filter circuit filters and attenuates interference signals in the voltage signals and then transmits the voltage signals to the sampling end of the sampling chip, and the sampling chip implements voltage sampling. The scheme provided by the invention can implement port ESD protection, filter and attenuate the interference signals in the voltage signals of the output end of the electrical core module group, and improve the voltage sampling reliability and stability of the electrical core.

Description

technical field [0001] The invention relates to the field of battery management systems, in particular to a filter synchronous anti-disturbance scheme for cell voltage sampling. Background technique [0002] In the field of power battery applications, whether the battery management system (BMS) can reliably obtain the battery voltage value seriously affects the implementation of the BMS system strategy and the management of the battery module, so the circuit used for battery voltage sampling, its The role played by reliability and stability is even more prominent. [0003] In the actual battery module assembly process, due to the uncertainty of the connection process between the BMS and the battery module sampling cable, there will be uncertainty in the power-on sequence of each sampling port of the BMS, resulting in an instantaneous surge pulse that will Cause damage to the sampling circuit, commonly known as hot swap. The IC (integrated circuit) damage rate caused by hot...

AI Technical Summary

Problems solved by technology

The IC (integrated circuit) damage rate caused by hot plugging will account for a large proportion of the failure rate of the entire BMS, causing large management costs and material scrap costs to production

[0004] In some BMS applications, there is also the problem that the distance between the voltage sampling line and the BMS is relatively long, so the wiring harness used to connect the BMS will be very long. Due to the influence of the parasitic inductance on the line, an induced electromotive force will be generated in actual use. As a result, the BMS is damaged, which is specifically manifested in the damage of the voltage sampling port

[0005] In the actual BMS application assembly process, due to the influence of ESD, ESD protection is required for the port of the sampling chip, otherwise the sampling chip will be damaged due to the influence of ESD

[0006] In addition to the energy provided by the battery, under the influence of its electrical load, its voltage will also have ripples and jitters. In severe cases, voltage jumps, common-mode and differential-mode interference signals, etc. will affect AFE (analog front-end) sampling. Accuracy and even damage BMS related circuits

[0007] At present, the method to improve the reliability and stability of the cell voltage is to add a filter circuit in the sampling circuit; however, due to the single function of the general filter circuit and insufficient filtering ability, the interference signal still exists, which affects the sampling accuracy of AFE and the reliability of voltage sampling. sex and timeliness

Interference signals can not only affect its own power supply circuit, but also affect the normal operation of the load circuit; in addition, in ordinary filter circuits, there is a certain failure rate of filter resistors and capacitors

Once the resistance is broken, the capacitor is short-circuited or leaked, etc., it will seriously affect the collection of battery cell voltage and bring unsafe factors to the system.

In addition, due to the large number of cell strings managed by a single AFE chip, in order to ensure the simultaneity of the voltage sampling of each string, it is necessary to ensure that the update frequency of the filtered voltage is lower than the sampling frequency of the AFE.

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