Manufacturing method of p-channel flash memory

Abstract

This application provides a method for manufacturing a P-channel flash memory. The manufacturing method includes: step S1, setting a mutually isolated storage structure and a selection gate structure on an N-type semiconductor substrate. The storage structure includes a first dielectric layer, a floating gate, and a second dielectric layer stacked away from the N-type semiconductor substrate in sequence. layer, control gate; Step S2, perform ion implantation on the N-type semiconductor substrate to form a drain extension region, and the drain extension region is located in the N-type semiconductor substrate on the first side of the selection gate structure; Step S3, in the memory structure and forming sidewalls on the side of the selection gate structure; and step S4, performing ion implantation on the N-type semiconductor substrate, forming a drain electrode in the drain extension region, and forming a source in the N-type semiconductor substrate on the second side of the memory structure. A P region is formed in the N-type semiconductor substrate between the first side of the memory structure and the second side of the selection gate structure. This method makes the reduction of the operating threshold of P-channel flash memory slow and has good durability.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a method for manufacturing a P-channel flash memory. Background technique [0002] Flash memory is a type of non-volatile memory in which data is retained even after power to the device is removed, thus allowing data to be written, read, and erased multiple times. Since the flash memory has the advantages mentioned above, it has been widely used in personal computers and electronic devices. [0003] Such as figure 1 The traditional flash memory shown includes an N-type semiconductor substrate 100', a storage structure 200', a spacer 600', a drain 401' and a source 701', and the storage structure 200' includes sequentially arranged on the N-type semiconductor substrate The tunnel oxide layer 201 ′, the floating gate 202 ′, the gate dielectric layer 203 ′, the control gate 204 ′ on the surface, and the sidewall 600 ′ are arranged on the sidewall...

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Problems solved by technology

[0013] The purpose of this application is to provide a manufacturing method of P-channel flash memory to solve the problem of poor durability of P-channel flash memory in the prior art

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