Semiconductor device and preparation method thereof and electronic device

Abstract

The invention relates to a semiconductor device and a preparation method thereof and an electronic device. The method comprises the following steps: (S1) providing a semiconductor substrate, forming a plurality of floating gate structures on the semiconductor substrate, forming shallow trench isolation structures which extend to the semiconductor substrate downwards between the adjacent floating gate structures; (S2) etching back and removing partial isolated oxides in the shallow trench isolation structures to expose the side walls of the floating gate structures; and (S3) etching the side walls of the floating gate structures by a chemical downstream etching method to make the side walls of the floating gate structures smooth and uniform. The side walls of the floating gate structures prepared by the method are relatively smooth; the LER performance between the floating gate structures is greatly improved; and meanwhile, the floating gate structures are relatively uniform, so that the coupling performance with the subsequently formed control gate structure is improved; and the performance and the yield of the device are further improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, and in particular, the invention relates to a semiconductor device, a preparation method thereof, and an electronic device. Background technique [0002] With the increasing demand for high-capacity semiconductor storage devices, the integration density of these semiconductor storage devices has received more attention. In order to increase the integration density of semiconductor storage devices, many different methods have been adopted in the prior art, such as through Reducing the size of the memory cell and / or changing the structure of the unit to form more memory cells on a single wafer, as for the method of increasing the integration density by changing the cell structure, attempts have been made by changing the planar layout of the active region or changing Cell layout to reduce cell area. [0003] NAND flash memory is a better storage solution than hard disk drives. Since NAND ...

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Problems solved by technology

[0005] Part of the sidewall of the floating gate structure obtained after the conventional COPEN step is vertical, and the sidewall is damaged during the etching process, which affects the storage capacity of the semiconductor device, making the The programming speed of semiconductor devices is reduced, and even fails

[0006] In addition, with the continuous shrinking of the size of semiconductor devices, the stability of the device has become the most important factor for device safety. With the continuous shrinking of the physical size of the device, the spacing between memory cells has been further reduced, so the influence between memory cells has become The primary factor affecting the stability of the device is that the sidewall of the floating gate is damaged in the COPEN process, making the floating gate structure (sidewall) not uniform enough, which further aggravates the influence between memory cells, thereby reducing the performance and yield of the device

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