Successive approximation register analog to digital converter (SAR ADC) and switching method during analog-digital conversion thereof

Abstract

The invention discloses a successive approximation register analog to digital converter (SAR ADC) and a switching method during analog-digital conversion thereof. The SAR ADC comprises a multi-reference generating circuit, a capacitor array digital-to-analog converter (DAC), a comparator and successive approximation control logic. The capacitor array DAC may comprise couple capacitors with binary coding bits of N-3 which are 3 less than the binary coding bits of N outputted by the SAR ADC, the capacitors with N-3 bits can achieve excellent effects of resolution of N bits, the capacitor array area can be effectively reduced, the total number of unit capacitors can be reduced by 87.5%, therefore, the circuit complexity is reduced, the manufacturing cost is saved, and the small size is satisfied. With the switching method provided by the invention, in the switching process, no energy is consumed for the first two comparisons and afterwards, the amount of power consumption for each comparison is less than that of a traditional structure; and compared with the traditional structure, the invention can save up to 99.4% of an average amount of dynamic power consumption in the switching, thereby reducing the overall power consumption.

Description

technical field [0001] The invention relates to an analog-to-digital converter and an analog-to-digital conversion method, in particular to a successive approximation analog-to-digital converter and a switching method during analog-to-digital conversion, belonging to the technical field of analog or digital-analog hybrid integrated circuits. Background technique [0002] The successive approximation analog-to-digital converter (SuccessiveApproximationRegisterAnalogtoDigitalConverter, SARADC) is a medium-to-high-precision and medium-speed analog-to-digital converter. Its advantages are low power consumption and small area. It is often used in radar, communication, image sensing and mobile phones. Touch screen and other fields. [0003] SARADC usually adopts a charge redistribution structure. Since the total unit capacitance of the capacitive successive approximation analog-to-digital converter is exponentially related to the ADC accuracy, for a higher-precision SARADC, the to...

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Problems solved by technology

[0003] SARADC usually adopts a charge redistribution structure. Since the total unit capacitance of the capacitive successive approximation analog-to-digital converter is exponentially related to the ADC accuracy, for a higher-precision SARADC, the total capacitance and chip area will increase sharply. Switching capacitors The dynamic power consumption during switching will also increase accordingly; so that the capacitive successive approximation analog-to-digital converter needs to use a large capacitor in the case of high resolution, which not only consumes a lot of charge and discharge power, but also wastes chip area by making a large capacitor , the economic benefit is not high

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