Method and device for data caching processing

Abstract

Embodiments of the invention provide a method and a device for data caching processing. The method for data caching processing comprises: receiving an access response message sent by internal storage, the access response message comprising accessed data and cache line addresses, the access response message being a response message corresponding to an access request message received by the internal storage when cache miss of each level cache; determining access frequency of the cache line addresses; and according to the access frequency, storing the access response message in the corresponding cache. The method and the device reduce miss rate of first level cache, and improve performance of a whole computer.

Description

technical field [0001] Embodiments of the present invention relate to computer science and technology, and in particular, to a data cache processing method and device. Background technique [0002] In the development of computer technology, the capacity of cache memory (English: Cache) is generally only a few hundredth of that of main memory, but its access speed can match that of CPU. Therefore, the use of Cache at the storage level solves the problem that the main memory access speed is slower than the central processing unit CPU operation speed. A Cache is composed of multiple cache memory lines (English: Cacheline), usually the size of each cacheline is between 32 bytes and 128 bytes. When the CPU accesses one or more bytes of the memory, it will extract a memory block of the same size as the cacheline from the memory to a Cacheline in the Cache, so that the CPU can access all the memory addresses corresponding to the Cacheline. Retrieving the result from the Cache doe...

AI Technical Summary

Problems solved by technology

[0004] Embodiments of the present invention provide a data cache processing method and device to overcome the technical problem of the high miss rate of the first-level cache in the prior art

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