Processing method of multi-signal board level clock domain crossing

Abstract

The invention discloses a processing method of multi-signal board level clock domain crossing. The method is characterized by comprising the following steps: arranging a memory between a transmission domain TX and a reception domain RX, writing data into the memory by the transmission domain TX under a clktx clock and reading the data out of the memory by the reception domain RX under the clkrx clock; connecting the reception domain RX to a burr processing module which is used for detecting high level of the clock; considering the clock as an active clock when the high level achieves a certain length; and considering the clock as burr when a high level signal with a certain width is output and lowering the level. By adopting the method, the influences caused by the burrs during the clock domain crossing are eliminated while the synchronization of asymmetric signals is completed, excessive production cost is not required and the method is simple and convenient.

Description

technical field [0001] The invention relates to the technical improvement of cross-board clock domains, in particular to a processing method for multi-signal cross-board clock domains. Background technique [0002] In modern electronic design, only the most elementary logic circuits use a single clock, and most designs related to data transmission face a challenge, that is, data transmission across multiple clock domains. The signal is transmitted from one clock domain to another. For the new clock domain, the signal is an asynchronous signal. The asynchronous signal must be synchronized to the new clock domain before subsequent processing can be performed on the synchronized signal. In the test circuit, the clock transmitting domain and the clock receiving domain are usually connected by a cable. This crossing of clock domains is called a cross-board clock domain. [0003] The signal needs to be delayed during transmission, and the delay is related to the length of the co...

AI Technical Summary

Problems solved by technology

But this method has limitations, you can only hope that the glitch does not appear on the clock edge, or the establishment and guarantee time of the data are not satisfied.

While this limitation eliminates most glitch effects, it does not preclude the occurrence of qualified glitches that can impact the system

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