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A method and node controller for processing memory access requests

A node controller and memory access request technology, applied in the computer field, can solve the problems of high overhead in cross-domain processing and inter-domain communication, and achieve the effect of reducing interconnection scale, improving system performance, and achieving remarkable effects.

Active Publication Date: 2018-03-23
INSPUR BEIJING ELECTRONICS INFORMATION IND
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention provides a method for processing memory access requests and a node controller, so as to solve the defects of relatively high overhead of cross-domain processing and inter-domain communication in the prior art

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  • A method and node controller for processing memory access requests
  • A method and node controller for processing memory access requests
  • A method and node controller for processing memory access requests

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Embodiment Construction

[0049] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0050] It should be noted that, if there is no conflict, the embodiments of the present invention and various features in the embodiments can be combined with each other, and all are within the protection scope of the present invention. In addition, although a logical order is shown in the flowcharts, in some cases the steps shown or described may be performed in an order different from that shown or described herein.

[0051] An embodiment of th...

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Abstract

The invention discloses a method for processing a memory access request and a node controller. The method includes the following steps: a first node controller receives a memory access request from a first processor; forwarding the memory access request to the processor corresponding to the memory access request, and receiving a memory access response returned by the processor corresponding to the memory access request; the first node controller sends the memory access response to the The first processor receives the consistency state information returned by the first processor, and records the consistency state information from the first processor. The present invention can reduce the number of node controllers, thereby reducing the memory space occupied by the node controllers, reducing the interconnection scale between nodes, simplifying the topology between nodes, and improving system performance. For the number of interconnection ports and the number of supported intra-domain processor IDs The effect is even more pronounced for very limited processors.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a method for processing memory access requests and a node controller. Background technique [0002] With the rapid development of computer technology, large-scale CC-NUMA (Cache Coherent Non-Uniform Memory Access, Cache Coherent Non-Uniform Memory Access) systems are increasingly widely used. The CC-NUMA system includes multiple nodes, and each node is composed of a processor and a node controller. The node controller is used to expand the system scale and maintain the consistency of the global cache, that is, it is necessary to maintain the Cache coherency among physical domains within a cache. [0003] In the prior art, the cache coherence domain in each node is composed of a processor and a node controller. For example, if you build a CC-NUMA system consisting of 64 processors that only support 2 processor IDs in the domain, each processor corresponds to L cache lines, you...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38
Inventor 赵雅倩倪璠史宏志李一韩陈继承
Owner INSPUR BEIJING ELECTRONICS INFORMATION IND
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