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FPGA-based multichannel cyclic data compressor and decompressor and method

A compressor and memory technology, applied in electrical components, code conversion, etc., can solve the problems of less system development, low data quantization accuracy, and poor real-time performance

Active Publication Date: 2015-10-07
西安广角智创电子科技有限公司
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, domestic research on the acquisition and processing of rotor strain data is mainly based on ground diagnosis and model building. There are relatively few actual system developments. A small number of rotor strain test systems have completed the functional requirements, but the data quantification accuracy is not high and the real-time performance is not good. And other issues

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  • FPGA-based multichannel cyclic data compressor and decompressor and method
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  • FPGA-based multichannel cyclic data compressor and decompressor and method

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Embodiment Construction

[0053] Now in conjunction with embodiment, accompanying drawing, the present invention will be further described:

[0054] The hardware environment used for implementation is: Spartan-6 series of XILINX company, two FPGA chips of model XC6SLX150, oscilloscope, logic analyzer, and the running software environment is: ISE14.5. Taking four-way data processing as an example, we implemented the method proposed by the present invention with ISE14.5 software.

[0055] Multiplex Data Loop Compressor Module

[0056] Its implementation is as follows figure 1 The design architecture shown is completed, and the modules included in the architecture and their structural realization relations are as follows:

[0057] ramp1 memory: written and generated in VHDL, with a data width of 16 bits and a data depth of 4. Its input terminal is connected to the output terminal of the predictor, which is used for buffering the predicted value parameters of multi-channel compression, and the output te...

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Abstract

The invention relates to an FPGA-based multichannel cyclic data compressor and a decompressor and a method. An FPGA-based ASIC design technology is adopted, and performance requirements of low power consumption, small size, light weight, high integration, large data processing amount per unit time, good scalability and the like by a rotor strain data processing system can be met; the strain quantization level is selected to be 16bit, multi-rotor strain data acquisition precision is improved, and quantization precision is ensured and real-time processing is also realized; the data reduction error is between 10<-3> to 10<-2> magnitude, and precision demands can be met; and abnormal strain values can be reduced timely.

Description

technical field [0001] The invention belongs to the field of digital signal processing, and relates to an FPGA-based multi-channel cyclic data compressor, decompressor and method. Background technique [0002] The helicopter rotor strain data acquisition and processing system has become an indispensable part of the helicopter onboard processing system. Real-time monitoring and strain data acquisition of the rotor can complete the real-time alarm during flight, which can improve the flight safety of the helicopter and has great significance. Practical value and broad application prospects. The airborne design platform has restrictions on data processing and transmission performance. The amount of data to be processed is large, but the data transmission capacity is limited. Therefore, the rotor strain data must be compressed, sent, received and decompressed to meet real-time performance. [0003] At present, foreign countries attach great importance to the real-time data proc...

Claims

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Application Information

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IPC IPC(8): H03M7/30
Inventor 赵天云李国祥郭雷王洪迅毋蒙
Owner 西安广角智创电子科技有限公司
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