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Compound semiconductor device and manufacturing method thereof

A compound semiconductor and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as increasing costs, achieve the effects of increasing difficulty, alleviating charge sensitivity, and optimizing surface field distribution

Active Publication Date: 2017-09-29
HANGZHOU SILAN MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method increases the cost of packaging in low-power power supplies, and the large ball in the startup circuit occupies a large proportion of the chip area

Method used

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  • Compound semiconductor device and manufacturing method thereof
  • Compound semiconductor device and manufacturing method thereof
  • Compound semiconductor device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0076] refer to figure 1 , figure 1 A complete layout of the compound semiconductor device according to the present embodiment is shown. The device layout in this embodiment is an interdigitated layout to obtain sufficient current capability. Such as figure 1 As shown, the layout mainly includes a drain portion 102 , a source portion 101 , a gate portion 103 , and a ground portion 100 . The straight-side area 104 framed by the dotted line is part of the actual conductive area, and other parts are connected in parallel with it. A transistor (for example, an LDMOS transistor in this embodiment) and a squeeze resistor are integrated in the compound semiconductor device, and the transistor and the squeeze resistor have a common drain to form a common drain structure. The common drain structure can make the product layout more compact, thereby saving chip area.

[0077] refer to figure 2 , figure 2 show figure 1 Schematic diagram of the cross-sectional mechanism of the mi...

no. 2 example

[0084] Such as image 3 As shown, in practical applications, such as power supply or AC-LED applications, the startup circuit 32 is usually required. When the circuit is started, the squeeze resistor 31 needs to be turned on and the starting circuit 32 is charged, and the circuit works normally after the charging is completed. At this time, the source of the squeeze resistor 31 is raised above 10V, and the squeeze resistor 31 is turned off. At this time, only a small current (for example, below 10 μA) flows from image 3 The resistance 33 on the left side flows through, then according to R=V / I estimation, this resistance 33 needs at least 1M ohm. At present, there are many 2K resistors used in the general process, and in order to ensure the accuracy of the resistor, the general resistor width is more than 2μm, so the 1M ohm resistor requires a very large length of the resistor (for example, more than 2000μm).

[0085] If such a large resistance is separately arranged outside...

no. 3 example

[0087] refer to Figure 5 , Figure 5 Another compound semiconductor device provided according to the third embodiment is shown. Figure 5 corresponds to figure 1 The straight-edge region 104 in the figure 1 The straight edge region 104 of is cut along AA' to get Figure 5 The sectional view shown. The third embodiment and figure 2 The device structure of the first embodiment shown is basically the same, the difference is that the doping types of all layers in the device structure are opposite to those of the first embodiment, thereby forming a P-type LDMOS transistor.

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Abstract

The invention provides a compound semiconductor device and a manufacturing method thereof, the device comprising: a semiconductor substrate of a first doping type; an epitaxial layer of a second doping type located on the semiconductor substrate; a high voltage well, located in the epitaxial layer; a deep well of the second doping type, located in the high-voltage well; a first well of the first doping type, located in the epitaxial layer in parallel with the high-voltage well; a source ohmic of the second doping type The contact area is located in the first well; the drain ohmic contact area is located in the deep well; the extrusion resistance ohmic contact area is located in the epitaxial layer; the gate close to the source ohmic contact area covers at least the source ohmic contact area and Epitaxial layer between high voltage wells. The device of the invention can be used for starting a circuit, and is beneficial to saving layout area and reducing cost.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing process, in particular to a composite high-voltage semiconductor device and a manufacturing method thereof. Background technique [0002] High-voltage BCD (Bipolar-CMOS-DMOS) technology generally refers to BCD technology with a withstand voltage of more than 100V. It is currently widely used in AC-DC power supplies, LED drivers and other fields. Generally, power devices are required to withstand a voltage ranging from 500V to 800V. [0003] The LDMOS (lateral double diffusion MOS) transistor device is a lateral high-voltage device, which is generally used as a driving device for the following modules in AC applications. Usually, all electrodes of LDMOS transistor devices are on the surface of the device, which is convenient for integrated design with low-voltage circuit parts. [0004] In AC applications, the drive circuit usually requires a start-up circuit. In the starting circuit...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/06H01L29/78H01L29/06H01L21/8249H01L21/336
Inventor 姚国亮张邵华吴建兴
Owner HANGZHOU SILAN MICROELECTRONICS
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