High-speed storage system achieving self-adaptive frequency

Abstract

A high-speed storage system achieving self-adaptive frequency comprises a plurality of slave equipment interfaces, a control unit, a frequency ratio regulation unit and a synchronization unit, wherein the slave equipment interfaces are used for sending access requests to the control unit and receiving response information and data of the control unit; the control unit is used for arbitrating and processing the access requests, sending the requests with high priority to a memory, pending the request with low priority, and monitoring memory port access conflict situations in real time; the frequency ratio regulation unit is used for inputting clock fractional frequency from the outside of a memory system to obtain a storage system clock according to the conflict situations and generating clock synchronization signals at the same time; the synchronization unit is used for converting access requests sent by master equipment into access request signals of a storage system clock domain and converting the data or response information returned by the storage system into signals of a master equipment clock domain. The access frequency of the memory can be automatically regulated according to the requirement of the storage system for the bandwidth of the memory, and therefore the high-speed storage system can meet system performance requirements under the condition that power consumption is made as low as possible.

Description

technical field [0001] The invention relates to the storage system field of a system chip (SoC), in particular to a high-speed storage system. Background technique [0002] At present, with the advancement of integrated circuit manufacturing technology, SoC (System on Chip) has become the driving force for the diversified development of embedded products. high demands. Especially in today's popular portable wearable devices, the balance between SoC performance and power consumption is particularly important. The memory system is very important in SoC and often becomes the bottleneck restricting SoC performance and power consumption. [0003] When the system is running, different applications and the same application may have different operating loads at different times, and the bandwidth requirements for memory will also change over time. When the system needs to access the memory frequently, it will cause the contention of the memory system port and reduce the system per...

AI Technical Summary

Problems solved by technology

[0004] In order to overcome the deficiency that the existing storage system cannot meet the requirements of low power consumption and high performance, the present invention provides a method that can automatically adjust the memory access frequency according to the bandwidth requirements of the system for the storage system, so that it can meet the requirements of low power consumption as low as possible. Frequency-adaptive high-speed storage system for system performance requirements

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