Nonvolatile SRAM (Static Random Access Memory) storage unit based on RRAM (Resistive Random Access Memory)

Abstract

The invention provides a nonvolatile SRAM (Static Random Access Memory) storage unit based on RRAM (Resistive Random Access Memory). By adoption of the nonvolatile SRAM storage unit, data can be automatically recovered, the stored data can be maintained still under the condition of power failure, the power consumption of a memory stand-by mode is low and the operation is convenient. The nonvolatile SRAM storage unit comprises a six-transistor SRAM unit 6T-SRAM and two 1T1RRAM unit, wherein the six-transistor SRAM unit 6T-SRAM comprises two N-type accessible transistors and four logic transistors in two cross-coupled inverters; the two ends of the N-type accessible transistors are respectively connected with a data line and a bit line at the same side; the RRAM unit comprises a variable-resistance resistor R and a selective transistor T respectively; the anode of the variable-resistance resistor R is connected with the source end of the selective transistor T, and the variable-resistance resistor R has two states, i.e., high resistance state and low resistance state; and the drain end of the RRAM unit is connected with the bit line at the opposite side, the cathode of the RRAM unit is connected with the data line at the same side, and the grid end of the RRAM unit is connected with a word line of the resistor.

Description

technical field [0001] The invention relates to the field of memory design, in particular to a non-volatile SRAM unit integrated with an RRAM unit. Background technique [0002] With the continuous advancement of process technology, the static power consumption caused by leakage accounts for an increasing proportion of memory power consumption in system-on-chip (SOC), especially for mobile chips, which are very important for power consumption. Also, for code storage and low-capacity data storage chips for many commercial and industrial applications, nonvolatile memory technologies faster than flash and EEPROM are required. [0003] The currently commonly used battery backup SRAM (BBSRAM, Battery Backup SRAM) cannot be applied in mobile SOC and battery-free solutions because it requires a board-level battery or packages the battery and SRAM together. There is also a solution of SRAM combined with embedded FLASH. Due to the limitation of FLASH programming and reading methods,...

AI Technical Summary

Problems solved by technology

But various combination in the prior art, the step of execution is comparatively complicated, and operation time is long

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