Double-output DC-DC oscillator circuit
A DC-DC, oscillator technology, applied in the field of DC-DC oscillator circuit, can solve problems such as large RMS current and mutual interference
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Embodiment 1
[0056] see figure 1 , the present invention includes an internal oscillating unit capable of generating a constant clock signal, a first narrow pulse generating unit and a second narrow pulse generating unit capable of converting the internal clock signal into a narrow pulse signal with a fixed pulse width, and generating two phase differences 180 The first sawtooth wave generation unit and the second sawtooth wave generation unit of the sawtooth wave signal;
[0057] The internal oscillating unit is respectively connected to the first narrow pulse generating unit and the second narrow pulse generating unit, and the internal oscillating unit is connected to the reference voltage V R1 and the enable signal EN, the phase difference between the constant clock signal output by the internal oscillation unit to the first narrow pulse generating unit and the constant clock signal output to the second narrow pulse generating unit is 180 degrees, the first narrow pulse generating unit ...
Embodiment 2
[0094] The internal oscillating unit and the narrow pulse generating unit of this embodiment are the same as those in Embodiment 1, and the circuit of the tooth wave generating unit is changed.
[0095] see Figure 5 , the circuit structure of the first sawtooth wave generation unit and the second sawtooth wave generation unit are the same, and both include an error amplifier 301, a second D flip-flop 302, a ninth inverter 303, an NMOS transistor M 301 , NMOS tube M 303 , NMOS tube M 305 , NMOS tube M 307 , NMOS tube M 311 , PMOS tube M 302 , PMOS tube M 304 , PMOS tube M 306 , PMOS tube M 308 , the third capacitor C 3 , the fourth capacitor C 4 and current source I R3 ;
[0096] The non-inverting input terminal of the error amplifier 301 is connected to the reference voltage V R2 , the inverting input terminal is connected to its output terminal, and at the same time it is connected to the NMOS transistor M 301 , NMOS tube M 305 and PMOS tube M 302 , PMOS tube ...
Embodiment 3
[0104] The internal oscillating unit and the sawtooth wave generating unit of this embodiment are the same as those in Embodiment 1, and the circuit of the narrow pulse generating unit is changed.
[0105] see Figure 6 , the circuit structure of the first narrow pulse generating unit and the second narrow pulse generating unit are the same, both including the first D flip-flop 201, the fifth inverter 202, the sixth inverter 203, the NAND gate 204, the eighth inverter Phase device 205, tenth inverter 206, seventh capacitor C 7 ;
[0106] The clock input terminal CLK of the first D flip-flop 201 is connected to V 1 or V 2 , its input terminal D is connected to the input terminal of the tenth inverter 206, and is connected to one of its output terminals XQ at the same time, the output terminal XQ of the first D flip-flop 201 is connected to the input terminal of the sixth inverter 203, and the reset terminal RST is connected to The output end of the eighth inverter 205, the ...
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