High-performance instruction cache system and method

Abstract

A system and a method for caching a high-performance instruction are applied to the field of processors, which can fill, before a processor core executes an instruction, the instruction in a high-speed memory that can be directly accessed by the processor core, so that the processor core can acquire a needed instruction from the high-speed memory almost each time, thereby achieving a high cache hit rate.

Description

technical field [0001] The invention relates to the fields of computer, communication and integrated circuit. Background technique [0002] Usually, the function of the cache is to copy part of the content in the lower-level memory, so that the content can be quickly accessed by the higher-level memory or the processor core, so as to ensure the continuous operation of the pipeline. [0003] The addressing of the current cache is based on the following method, use the index segment in the address to address the tag in the read tag memory and match the tag segment in the address; use the index segment in the address and the displacement segment in the block to jointly address the read cache in the content. If the tag read from the tag memory is the same as the tag segment in the address, then the content read from the cache is valid, which is called a cache hit. Otherwise, if the tag read from the tag memory is not the same as the tag segment in the address, it is called a c...

AI Technical Summary

Problems solved by technology

However, with the widening processor / memory speed gap, the current architecture, especially multiple cache misses, has become the most serious bottleneck restricting the performance improvement of modern processors

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