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Circuit for linearization of power amplifier

A power amplifier circuit, linearization technology, applied in the direction of improving amplifiers to reduce nonlinear distortion, power amplifiers, components of amplifiers, etc., can solve problems such as signal phase and amplitude distortion, and achieve improved nonlinearity, simple structure, Obvious effect

Inactive Publication Date: 2015-02-18
BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The gate-source capacitance of NMOS and PMOS devices varies nonlinearly with the gate voltage. In the power amplifier, as the input signal changes, the gate-source voltage of NMOS or PMOS devices changes, and the gate capacitance also changes accordingly, resulting in the phase and amplitude of the signal. distortion

Method used

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  • Circuit for linearization of power amplifier

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Embodiment Construction

[0017] figure 1 The specific implementation of the circuit is illustrated as follows:

[0018] Wherein, the NMOS transistor M1 , the resistor R1 , the inductor L1 and the capacitors C1 and C2 form a power amplifier circuit 110 . The internal connection relationship of the power amplifier circuit 110 is: one end of C1 is used as a signal input, and the other end is connected to the gate of M1; one end of the resistor R1 is used as the input of the bias voltage Vg of M1, and the other end is connected to the gate of M1; one end of the inductor is connected to the power supply VDD1 of the power amplifier , the other end is connected to the drain of M1; the source of the NMOS transistor M1 is grounded; one end of the capacitor C2 is connected to the drain of M1, and the other end is connected to the matching circuit 120 as an output.

[0019] The matching circuit 120 is composed of a transmission line, a capacitor, an inductor or a resistor, and mainly plays the role of impedance...

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Abstract

The invention relates to a circuit for linearization of a power amplifier, is mainly applied to linearization application of a radio frequency power amplifier, and belongs to the design field of radio frequency integrated circuits. The circuit adopts the structure that a PMOS is connected in parallel with the grid end of an NMOS according to the characteristic that the grid capacitance of the NMOS and that of the PMOS are complimentary along with the grid voltage variation; the grid capacitance of the NMOS is compensated by that of the PMOS, so that the input terminal capacitance of the circuit is a constant during grid voltage variation. Therefore, when the input amplitude of the circuit changes under a large signal work mode of the circuit of the power amplifier, the input terminal capacitance of the circuit is a constant; nonlinearity caused by grid capacitance variation of the NMOS is eliminated; the degree of linearity of the power amplifier is improved. Moreover, when the design of the power amplifier adopts PMOS, the PMOS can be compensated through the NMOS to realize linearization of the power amplifier.

Description

technical field [0001] The invention relates to a power amplifier linearization compensation circuit, which is mainly used in the linearization application of radio frequency power amplifiers and belongs to the field of radio frequency integrated circuit design. Background technique [0002] The power amplifier is an important module in the radio frequency transmission path. Its main function is to amplify and transmit the transmitted signal to the antenna. The power amplifier works in a large signal state, which has a great impact on the linearity of the transmission system, especially when the amplitude and phase modulation are used at the same time. In communication applications, the power amplifier has a greater impact on the linearity of the system. Therefore, power amplifiers often have higher linearity requirements, and the source of nonlinearity of the power amplifier should be analyzed in the design, and the linearity can be improved through linearization technology...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03F3/20H03F3/189H03F1/32
CPCH03F3/2171H03F1/3205
Inventor 李维忠李罗生
Owner BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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