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A Low Power Consumption 12-bit Pipelined Successive Approximation Analog-to-Digital Converter

An analog-to-digital converter, successive approximation technology, applied in the direction of analog/digital conversion, code conversion, instruments, etc., can solve the problems that the circuit power consumption cannot be effectively reduced, the difficulty of 128 times amplifier, high output accuracy, etc., to achieve The effect of reducing the output amplitude, breaking through the performance bottleneck, and improving the overall performance

Active Publication Date: 2017-11-14
SOUTH CHINA UNIV OF TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there are still problems in the design of the traditional pipelined successive approximation analog-to-digital converter: 1. The design of the sub-stage analog-to-digital converter of the traditional pipelined successive approximation analog-to-digital converter adopts the successive approximation converter with capacitive-resistive structure
In this way, the power consumption of the circuit cannot be effectively reduced, and it is difficult for the 128-fold amplifier to achieve high output accuracy

Method used

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  • A Low Power Consumption 12-bit Pipelined Successive Approximation Analog-to-Digital Converter
  • A Low Power Consumption 12-bit Pipelined Successive Approximation Analog-to-Digital Converter
  • A Low Power Consumption 12-bit Pipelined Successive Approximation Analog-to-Digital Converter

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Embodiment Construction

[0026] refer to figure 1 , a low-power 12-bit pipelined successive approximation analog-to-digital converter of the present invention, comprising a 6-bit sub-level successive approximation analog-to-digital converter 101, an operational amplifier 105, a 7-bit sub-level successive approximation analog-to-digital converter 106 and a digital delay calibration unit 110, the residual signal output of the 6-bit sub-stage successive approximation analog-to-digital converter 101 is connected to the input terminal of the operational amplifier 105, and the digital signal of the 6-bit sub-stage successive approximation analog-to-digital converter 101 is output to the digital delay calibration unit 110 The high six-bit input terminal of the operational amplifier 105 is connected to the input terminal of the 7-bit sub-stage successive approximation analog-to-digital converter 106, and the digital signal output of the 7-bit sub-stage successive approximation analog-to-digital converter 106 i...

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Abstract

The invention discloses a 12-bit pipelined successive approximation analog-to-digital converter with low power consumption, which comprises a 6-bit sub-level successive approximation analog-to-digital converter, an operational amplifier, a 7-bit sub-level successive approximation analog-to-digital converter and a digital delay calibration unit. The residual signal output of the 6-bit sub-stage successive approximation analog-to-digital converter is connected to the input terminal of the operational amplifier, and the digital signal of the 6-bit sub-stage successive approximation analog-to-digital converter is output to the high six input terminals of the digital delay calibration unit, The output end of the operational amplifier is connected to the input end of the 7-bit sub-stage successive approximation analog-to-digital converter, and the digital signal output of the 7-bit sub-stage successive approximation analog-to-digital converter is connected to the lower six inputs of the digital delay calibration unit end. The invention can effectively realize the combination of the pipeline analog-to-digital converter and the successive approximation comparator, effectively improve the comprehensive performance of the analog-to-digital converter, has lower power consumption than similar analog-to-digital converters, and has wide application prospects in deep submicron technology.

Description

technical field [0001] The invention relates to the technical field of analog-to-digital converters, in particular to a 12-bit pipelined successive approximation analog-to-digital converter with low power consumption. Background technique [0002] With the wide application of digital signal processing technology in the fields of high-resolution images, video processing, and wireless communication, the circuit system puts forward higher requirements for analog-to-digital converters. High-speed, high-precision, low-power ADCs have become the pursuit of the industry. Target. [0003] With the development of advanced manufacturing industry, semiconductor device technology has been developed to the deep sub-micron technology field, which brings many benefits to the signal processing circuit: lower power supply voltage, lower power consumption, higher processing speed, more High integration, smaller chip area, but higher requirements for analog circuit design, traditional circuit...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/38
Inventor 李斌陈华濂吴朝晖武海军
Owner SOUTH CHINA UNIV OF TECH
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