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High-performance and low-complexity LDPC decoder based on randomized computation

A low-complexity, decoder technology, applied in the field of high-performance and low-complexity LDPC decoders, can solve problems such as complicated decoder connections, reduced chip operating frequency, and excessive chip area, achieving improved Chip area utilization, reduce wiring complexity, and improve throughput

Active Publication Date: 2014-12-24
FUDAN UNIV
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  • Application Information

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Problems solved by technology

In this case, the wiring complexity in the decoder is too complicated, and it takes up a lot of chip area, which brings extra power consumption and reduces the operating frequency of the chip.
Today, when smartphones are popular, excessive chip area and high power consumption are obviously unbearable

Method used

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  • High-performance and low-complexity LDPC decoder based on randomized computation
  • High-performance and low-complexity LDPC decoder based on randomized computation
  • High-performance and low-complexity LDPC decoder based on randomized computation

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Embodiment Construction

[0020] figure 1 Shown is the schematic block diagram of the designed random computing-based high-performance low-complexity LDPC decoder. Within each dotted box is an important module. It includes the LFSR module, which includes a total of 24 random number generators, which are used to generate random numbers and randomize the probability values; the LUT module, which includes a total of 576 look-up tables, which are used to convert channel information into corresponding probability values, and According to the NDS parameters, the probability value is correspondingly reduced; the VN module, including 576 VNs, receives the prior information from the CN, calculates the extrinsic information and the posterior information, and transmits the extrinsic information to the corresponding CN module, and the posterior information to Corresponding saturation counter (included in VN). The basic structure is as figure 2 As shown; CN module, including 96 CNs, receives the external inform...

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Abstract

The invention belongs to the technical field of wireless digital communication and broadcasting, and particularly provides a high-performance and low-complexity LDPC decoder based on randomized computation. The decoder supports an IEEE802.16 (WiMAX) standard and structurally comprises a look up table (LUT) array of NDS coefficients suitable for a (576 and 480) check matrix in the IEEE802.16 (WiMAX) standard, a VN array with the EM initialization function and a saturating counter with computation posteriori information and SM. An information spreading decoding algorithm based on randomized computation is adopted in the decoder, and the wiring complexity of the decoder can be effectively lowered and the area utilization rate of a chip can be increased while the requirement for a current communication standard throughput rate is met; meanwhile, the decoder selects proper NDS parameters and improves a randomized computation hardware structure according to the specific check matrix, initialization time is shortened, the convergence speed is increased, the decoding performance of randomized computation of the decoder is improved, decoding time is shortened, and the throughput rate is increased.

Description

technical field [0001] The invention belongs to the technical field of wireless digital communication and broadcasting, and in particular relates to a high-performance and low-complexity LDPC decoder based on random calculation. Background technique [0002] Since the 1990s, human society has entered a stage of rapid development of digitization and informationization. Due to the different social environments and the rapid development of information science and technology, various digital communication technologies are constantly emerging in various fields of society, and people's pursuit of high-speed and reliable communication systems is also increasing. By encoding and decoding the channel information, the information with channel noise can be corrected to ensure the safety and reliability of the information. Among them, LDPC code (Low Density Parity Check Code) is a high-performance encoding and decoding method, and its performance can approach Shannon's limit. The LDPC...

Claims

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Application Information

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IPC IPC(8): H03M13/11
Inventor 陈赟张启晨吴迪曾晓洋
Owner FUDAN UNIV
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