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OPC method for reducing correction iterations

A technology of iteration times and correction amount, applied in the field of OPC that reduces the number of correction iterations, can solve the problems of OPC without considering the offset change of mask lithography conditions, and the decrease of OPC accuracy, so as to reduce the OPC correction time and improve the correction efficiency. Effect

Active Publication Date: 2014-11-26
SHANGHAI HUALI MICROELECTRONICS CORP
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AI Technical Summary

Problems solved by technology

The traditional model-based OPC method generally considers the impact of edge placement errors, but does not consider the impact of mask size error changes and lithographic condition offset changes on the accuracy of OPC.
Therefore, reducing the number of iterations will cause a decrease in OPC accuracy

Method used

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Embodiment Construction

[0027] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be further described below in conjunction with the accompanying drawings. Of course, the present invention is not limited to this specific embodiment, and general replacements known to those skilled in the art are also covered within the protection scope of the present invention.

[0028] The following will be combined with figure 2 -5 and specific embodiments The OPC method for reducing the number of iterations of the present invention is further described in detail. It should be noted that the drawings are all in a very simplified form, using imprecise scales, and are only used to facilitate and clearly achieve the purpose of assisting in describing the present embodiment.

[0029] see figure 2 , is a schematic flow diagram of an OPC method for reducing the number of iterations in a preferred embodiment of the present invention, and the...

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Abstract

The invention provides an OPC method for reducing correction iterations. The OPC method comprises the following steps: executing an OPC process, thereby obtaining an original OPC correction diagram via original iterations; verifying the original OPC correction diagram; finding out the difference between the original correction diagram and a target diagram as the original OPC correction quantity, and setting the supercritical value of the original OPC correction; marking a target diagram with the original OPC correction quantity exceeding the critical value of the original OPC correction in the original OPC correction diagram; setting new iterations, executing the new OPC iteration process, and assigning the original OPC correction quantity to the marked target diagram in the first time of iteration; acquiring and verifying the new OPC correction diagram; and judging whether the verification result of the OPC correction diagram is within the error standard, if yes, taking the new iterations as the new OPC iterations, and if not, adding one to the new iterations, and executing the new OPC process again until the verification result of the new OPC is within the error standard, so that the OPC precision is ensured, and the time is saved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an OPC method for reducing the number of correction iterations. Background technique [0002] In the deep submicron semiconductor manufacturing process, with the continuous reduction of feature size and the increasing complexity of patterns, OPC technology has been widely used in the reticle publishing of various key levels. The most widely used OPC method at present is the OPC correction method based on the model. Its basic principle is to simulate the original layout or the target layout by establishing an exposure model based on specific lithography conditions to obtain the simulation error, and then the original layout according to a certain Segmentation is carried out according to the rules, and the offset compensation and re-simulation are performed on the segments according to the simulation error. After several rounds of simulation and correction, the simulation re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F1/36
Inventor 何大权顾婷婷魏芳朱骏张旭昇
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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