10-bit ultra-low-power successive approximation register analog-to-digital converter based on charge redistribution

Abstract

The invention provides a 10-bit ultra-low-power successive approximation register analog-to-digital converter based on charge redistribution. The analog-to-digital converter comprises a sampling network, a differential capacitor array, a comparator and a successive approximation control logic device; the differential capacitor array is connected with the sampling network, the comparator is connected with the differential capacitor array, and the successive approximation control logic device is connected with the comparator. The differential capacitor array includes a first capacitor array connected with a non-inverting input end of a comparator circuit and a second capacitor array connected with an inverting input end of the comparator circuit. Each of the first capacitor array and the second capacitor array consists of nine groups of capacitors which are of binary structures; bottom plates of all redundant capacitors are selectively connected with common-mode voltage or ground and the rest eight groups of capacitors are selectively connected with the common-mode voltage, power voltage or ground. An output end of the successive approximation control logic device controls switching of capacitor switches of the differential capacitor array to be connected with the voltage selectively. The first capacitor array and the second capacitor array sample input signals and input samples to the comparator, and a comparison result of the comparator is input to the successive approximation control logic device.

Description

technical field [0001] The invention relates to the field of digital-analog hybrid integrated circuit design, in particular to an ultra-low power consumption successive approximation analog-to-digital converter based on charge redistribution. Background technique [0002] Successive approximation analog-to-digital converter (SAR ADC) is a type of analog-to-digital converter with medium precision and medium sampling rate. It has the advantages of simple structure, small area and low power consumption, so it is widely used in various medical and portable electronic devices. equipment and communication systems. Since the successive approximation analog-to-digital converter does not require linear gain blocks such as operational amplifiers, the SAR ADC can better adapt to the technological evolution trend of reduced feature size and lower power supply voltage. With the advancement of technology, the conversion rate that SAR ADC can achieve has also increased to hundreds of mega...

AI Technical Summary

Problems solved by technology

[0005] The object of the present invention is to provide a 10-bit ultra-low power successive approximation analog-to-digital converter based on charge redistribution, which solves the problem of the traditional capacitor array-based successive approximation analog-to-digital converter due to the relatively large area of ​​the capacitor array. The accuracy of the traditional successive approximation analog-to-digital converter cannot be very high, and it will cause the problem of increased power consumption

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